source: trunk/source/compiler

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Diff Rev Age Author Log Message
(edit) @15094   8 years gb So much for "the buildbot will catch any problems after r15093". Add a …
(edit) @15093   8 years gb New Linux ARM binaries. The image and FASL versions changed on the …
(edit) @15089   8 years gb Where did the bug fixed in r15088 come from, anyway ?
(edit) @15088   8 years gb In ARM2-%ILOGXOR2, if vreg isn't a node reg we need to do the logxor …
(edit) @15085   8 years gb Yet another typo in ARM2-FOUR-UNTARGETED-REG-FORMS (need to set ADEST …
(edit) @15080   8 years gb @+ vinsn macro doesn't invalidate regmap. (Spent several days trying …
(edit) @15079   8 years gb NX1-%PTR-TO-INT: %PTR-TO-INT's result is of *NX-TARGET-NATURAL-TYPE*.
(edit) @15078   8 years gb NX2-SELECT-FPR-CANDIDATES: don't use FPR if var isn't SETQed.
(edit) @15077   8 years gb FLOAT: don't coerce double-float to single if 2nd arg not supplied.
(edit) @15076   8 years gb VINSN-SEQUENCE-HAS-SOME-ATTRIBUTE-P.
(edit) @15075   8 years gb Make 'vpush1' and 'vpop1' instructions, don't define them as lap …
(edit) @15067   8 years gb Provide definitions (real ones or stubs) of the 4 functions that have …
(edit) @15066   8 years gb When allocating "untargeted" temporary registers, heuristically try to …
(edit) @15059   8 years gb Same as r15058, for x86.
(edit) @15058   8 years gb In ARM2-INLINE-NUMCMP, don't map the condition codes to T/NIL if we're …
(edit) @15052   8 years gb When processing self tail-calls in X862-SELF-CALL: don't skip a form …
(edit) @15051   8 years gb nx2.lisp: New function NX2-VAR-NOT-REFFED-BY-FORM-P. Walks acode, …
(edit) @15050   8 years gb In NX2-AFUNC-ALLOCATE-GLOBAL-REGISTERS, increase var weight if …
(edit) @15042   8 years gb Actually pass the afunc arg to NX2-AFUNC-ALLOCATE-GLOBAL-REGISTERS.
(edit) @15041   8 years gb Work in progress.
(edit) @15040   8 years gb NX1-FORM and friends (including alphatizers) take a "context" …
(edit) @15039   8 years gb NX-CONS-VAR inits VAR-LOCAL-BITS slot.
(edit) @15038   8 years gb Add VAR-LOCAL-BITS slot to VAR istruct; tracks local (per function, if …
(edit) @15037   8 years gb Replace (NX2-ALLOCATE-GLOBAL-REGISTERS ,@several-afunc-slot-values) …
(edit) @15035   8 years gb In X862-TWO-UNTARGETED-REG-FORMS: if we're called with a non-zero …
(edit) @15032   8 years gb In X862-{THREE,FOUR}-UNTARGETED-REG-FORMS: when a destination register …
(edit) @15024   8 years gb x8664-vinsns.lisp: don't (necessarily) clobber ra0 in PUSH-LABEL …
(edit) @15022   8 years gb vinsn.lisp: add two new slots to the VINSN struct, to track GPRs and …
(edit) @15017   8 years gb MISC-REF-C-BIT and MISC-REF-C-BIT-FIXNUM vinsns (both ppc32 and …
(edit) @15016   8 years gb In ARM2-AREF3 and ARM2-ASET3, be more careful about finding a node …
(edit) @15013   8 years gz Only store *fcomp-stream-position* in compiler warnings if it's …
(edit) @15007   8 years gb arm-asm.lisp: define the canonical (ARMv6T2+) nop instruction. …
(edit) @15006   8 years gb Short version: D'oh! Longer version: Enable *x862-generate-casejump* …
(edit) @15005   8 years gb Disable *X86-GENERATE-CASEJUMP* until it works better …
(edit) @15004   8 years gb Do some cases of CASE (and similar constructs) in constant time by …
(edit) @15000   8 years rme In r14968, we overloaded a couple of slots in the x86 xcf in order to …
(edit) @14999   8 years gb x8664-vinsns: actually commit the file. x8632-vinsns: in CJMP vinsn, …
(edit) @14998   8 years gb Conditionally (using *x862-generate-casejump*, which defaults to false …
(edit) @14994   8 years gb in x862-aref3: don't compare a constant K to dim2 unless we're sure …
(edit) @14989   8 years gb In NX1-TRANSITIVELY-PUNT-BINDINGS, zero out out (VAR-REFS VAR) after …
(edit) @14983   8 years gb NX-ADJUST-SETQ-COUNT: the value of the VAR-REFS slot isn't necessarily …
(edit) @14982   8 years gb We've traditionally tried to estimate the number of …
(edit) @14980   8 years gb Add (%nx1-operator div2) to *numeric-acode-ops*; this allows us to do …
(edit) @14979   8 years gb x8632 REQUIRE-CHARACTER vinsn: how you extract the low byte of a …
(edit) @14978   8 years gb Cut-and-paste errors are also known as bugs in "typo propagation".
(edit) @14972   8 years gb Support keeping float-typed variable values in non-volatile FPRs on …
(edit) @14970   8 years gb In ARM2-ELIDE-PUSHES: we only have 8 non-volatile DOUBLE-FLOAT registers.
(edit) @14969   8 years gb Try to speed up some cases involving self-calls where the number of …
(edit) @14967   8 years rme Same story as r14966, but for x862-elide-pushes.
(edit) @14966   8 years rme In arm2-elide-pushes, instead of pushing/popping a double-float …
(edit) @14959   8 years gb %HARD-REGSPEC-VALUE masks its argument by the platform-specific value …
(edit) @14958   8 years rme Make regs-set-in-vinsn-sequence work.
(edit) @14957   8 years gb fldmiad definition: count operand is :DRCOUNT PARSE-IMM16-OPERAND: …
(edit) @14956   8 years gb In SAVE-STACKARGS-FRAME: want to use X8664::NODE-SIZE if targeting …
(edit) @14955   8 years gb ARM-CONSTANT-INDEX: (CDR (ASSOC ...)), not (ASSOC ...).
(edit) @14954   8 years rme temp-push-single-float: :tsp attribute => :csp (no tsp on ARM).
(edit) @14951   8 years rme Add a couple instructions, correct some instruction masks for the …
(edit) @14948   8 years gb Fix cut-and-paste mishaps.
(edit) @14945   8 years rme Add fmacd instruction. (We could add similar others easily when the …
(edit) @14943   8 years gb %FIXNUM-{REF|SET}-DOUBLE-FLOAT support in x86 backends.
(edit) @14942   8 years gb %FIXNUM-{REF|SET}-DOUBLE-FLOAT support in PPC backends.
(edit) @14941   8 years gb CASE optimizations were accidentally enabled in the last commit; they …
(edit) @14940   8 years gb In things defined by DEFARM2-SF-OP and DEFARM2-DF-OP, try to ensure …
(edit) @14939   8 years gb Change the rules a bit to allow the LR to point to arbitrary …
(edit) @14938   8 years gb PUSH-FPRS, POP-FPRS: save/restore non-volatile FPRs (as doubles) …
(edit) @14922   8 years gb In ARM disassembler, print apparent fixnum-valued operands using QUOTE …
(edit) @14909   8 years gb Back out of r14899 (ARM backend changes): at least one of those …
(edit) @14899   8 years gb Try to allow some cases of self calls to skip arg-count checks, …
(edit) @14898   8 years gb CJMP vinsn generates prologue for a computed jump.
(edit) @14897   8 years gb push/pop multiple FPRs.
(edit) @14893   8 years gb ACODE-CONSTANT-P returns (values constant-value constant-p), not what …
(edit) @14890   8 years gb Add NX2-RECONSTRUCT-CASE: if an IF form appears to be the expansion of …
(edit) @14852   8 years rme When assembling for a 32-bit x86 target, use the modrm encoding (and …
(edit) @14848   8 years gb Fix transposed args in FPR-MASK-FOR-VREG.
(edit) @14847   8 years gb Coercing a DOUBLE-FLOAT to a SINGLE-FLOAT can overflow; provide "safe" …
(edit) @14846   8 years gb Missed some (fairly visible) cases where ARM FPR targeting had to be …
(edit) @14843   8 years gb Provide some help in determining arithmetic-error operation/operands …
(edit) @14838   8 years gb Partial support for determining arithmetic-error operation/operands on …
(edit) @14834   8 years gb Re-do the common FPR-tracking/targeting, so that aliased FPRs (as on …
(edit) @14823   9 years gb Save the (C) non-volatile FPRs (d8-d15, which are aliased to s16-s31) …
(edit) @14822   9 years gb Use acode optimizers in x86 backend.
(edit) @14819   9 years gz Add code-note-acode-start/end-pos
(edit) @14810   9 years rme Repair bad indentation from copy-and-paste in x86-print-di-lap.
(edit) @14809   9 years rme New parameter ccl::*disassemble-verbose*. In the x86 disassembler, …
(edit) @14807   9 years gb Define and export the functions ALLOW-HEAP-ALLOCATION and …
(edit) @14793   9 years gb Add a new "strict-structure-typechecking" hook to compiler-policy …
(edit) @14787   9 years gb Try to straighten out ARM2-GET-FLOAT and supporting vinsns.
(edit) @14780   9 years gb In ACODE-OPTIMIZE-SUB2, actually generate some code for the …
(edit) @14778   9 years gb Constant-fold in ACODE-OPTIMIZE-MINUS1; call it in the ARM backend.
(edit) @14777   9 years gb Floating-point negation in the x86 backends; this time, don't depend …
(edit) @14776   9 years gb Floating-point negation in the x86 backends.
(edit) @14775   9 years gb Unary fp negation in the PPC backend, and in acode.
(edit) @14774   9 years gb Back out of r14758, too.
(edit) @14773   9 years gb Back out of r14759.
(edit) @14772   9 years rme Teach lisp assembler about mla (multiply accumulate). Use it in …
(edit) @14771   9 years gb Use the LR to point into double-float vectors when getting/setting …
(edit) @14768   9 years gb !ALLOC-EABI-C-FRAME: can save a few instructions, since the size of …
(edit) @14765   9 years gb Print the relative PC every few instructions.
(edit) @14764   9 years gb The CHECK-NARGS ARM lapmacro has handled the case when min and max …
(edit) @14763   9 years gb Floating-point negation. Tighten up some FP memory access stuff. Use …
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