Index: /branches/ia32/compiler/X86/x862.lisp
===================================================================
--- /branches/ia32/compiler/X86/x862.lisp	(revision 9582)
+++ /branches/ia32/compiler/X86/x862.lisp	(revision 9583)
@@ -2317,5 +2317,7 @@
                             (x862-lri seg reg constval)
                             (if *x862-reckless*
-                              (! %unbox-u32 reg result-reg)
+			      (target-arch-case
+			       (:x8632 (! unbox-u32 reg result-reg))
+			       (:x8664 (! %unbox-u32 reg result-reg)))
                               (! unbox-u32 reg result-reg)))))
                    reg)))
@@ -2520,15 +2522,22 @@
 						value result-reg)))))
         (when safe
-	  (with-additional-imm-reg (src unscaled-idx result-reg)
-	    (let* ((*available-backend-imm-temps* *available-backend-imm-temps*)
-		   (value (if (eql (hard-regspec-class result-reg)
-				   hard-reg-class-gpr)
-			    (hard-regspec-value result-reg))))
-	      (when (and value (logbitp value *available-backend-imm-temps*))
-		(setq *available-backend-imm-temps* (bitclr value *available-backend-imm-temps*)))
-	      (if (typep safe 'fixnum)
-		(! trap-unless-typecode= src safe))
-	      (unless index-known-fixnum
-		(! trap-unless-fixnum unscaled-idx))
+	  (let* ((*available-backend-imm-temps* *available-backend-imm-temps*)
+		 (value (if (eql (hard-regspec-class result-reg)
+				 hard-reg-class-gpr)
+			  (hard-regspec-value result-reg)))
+		 (result-is-imm nil))
+	    (when (and value (logbitp value *available-backend-imm-temps*))
+	      (setq *available-backend-imm-temps* (bitclr value *available-backend-imm-temps*))
+	      (setq result-is-imm t))
+	    (if (typep safe 'fixnum)
+	      (if result-is-imm
+		(with-additional-imm-reg (src safe)
+		  (! trap-unless-typecode= src safe))
+		(! trap-unless-typecode= src safe)))
+	    (unless index-known-fixnum
+	      (! trap-unless-fixnum unscaled-idx))
+	    (if result-is-imm
+	      (with-additional-imm-reg (unscaled-idx src)
+		(! check-misc-bound unscaled-idx src))
 	      (! check-misc-bound unscaled-idx src))))
         (x862-vset1 seg vreg xfer type-keyword src unscaled-idx index-known-fixnum result-reg (x862-unboxed-reg-for-aset seg type-keyword result-reg safe constval) constval needs-memoization)))))
