Changeset 5046
- Timestamp:
- Aug 28, 2006, 3:54:19 AM (18 years ago)
- Location:
- trunk/ccl/compiler/PPC
- Files:
-
- 3 edited
-
PPC32/ppc32-vinsns.lisp (modified) (3 diffs)
-
PPC64/ppc64-vinsns.lisp (modified) (1 diff)
-
ppc2.lisp (modified) (7 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/ccl/compiler/PPC/PPC32/ppc32-vinsns.lisp
r4671 r5046 993 993 ((src :lisp)) 994 994 ((crf0 (:crf 0)))) 995 ; The bottom ppc32::fixnumshift bits and the top (- 31 (+ ppc32::fixnumshift 8)) must all be zero. 995 ;; The bottom ppc32::fixnumshift bits and the top (- 31 (+ 996 ;; ppc32::fixnumshift 8)) must all be zero. 996 997 (rlwinm. dest src 0 (- ppc32::nbits-in-word ppc32::fixnumshift) (- ppc32::least-significant-bit (+ ppc32::fixnumshift 8))) 997 998 (rlwinm dest src (- 32 ppc32::fixnumshift) 24 31) … … 999 1000 (uuo_interr arch::error-object-not-unsigned-byte-8 src) 1000 1001 :got-it) 1002 1003 (define-ppc32-vinsn %unbox-u8 (((dest :u8)) 1004 ((src :lisp)) 1005 ) 1006 (rlwinm dest src (- 32 ppc32::fixnumshift) 24 31)) 1001 1007 1002 1008 (define-ppc32-vinsn unbox-s8 (((dest :s8)) … … 2309 2315 (slwi dest src (- ppc32::charcode-shift ppc32::fixnumshift)) 2310 2316 (addi dest dest ppc32::subtag-character)) 2317 2311 2318 2312 2319 (define-ppc32-vinsn u8->char (((dest :lisp)) -
trunk/ccl/compiler/PPC/PPC64/ppc64-vinsns.lisp
r4673 r5046 1090 1090 (uuo_interr arch::error-object-not-unsigned-byte-8 src) 1091 1091 :got-it) 1092 1093 (define-ppc64-vinsn %unbox-u8 (((dest :u8)) 1094 ((src :lisp))) 1095 ;; The bottom ppc64::fixnumshift bits and the top (- 63 (+ 1096 ;; ppc64::fixnumshift 8)) must all be zero. 1097 (rldicl dest src (- 64 ppc64::fixnumshift) 56)) 1092 1098 1093 1099 (define-ppc64-vinsn unbox-s8 (((dest :s8)) -
trunk/ccl/compiler/PPC/ppc2.lisp
r4677 r5046 1357 1357 (unscaled-idx nil) 1358 1358 (src nil)) 1359 (ensuring-node-target 1360 (target vreg) 1361 (if (or safe (not index-known-fixnum)) 1362 (multiple-value-setq (src unscaled-idx) 1363 (ppc2-two-untargeted-reg-forms seg vector ppc::arg_y index ppc::arg_z)) 1364 (setq src (ppc2-one-untargeted-reg-form seg vector ppc::arg_z))) 1365 (when safe 1366 (if (typep safe 'fixnum) 1367 (! trap-unless-typecode= src safe)) 1368 (unless index-known-fixnum 1369 (! trap-unless-fixnum unscaled-idx)) 1370 (! check-misc-bound unscaled-idx src)) 1371 (if is-32-bit 1372 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-32-bit-constant-index arch))) 1373 (cond ((eq type-keyword :single-float-vector) 1374 (! misc-ref-c-single-float 0 src index-known-fixnum) 1375 (! single->node target 0)) 1376 (t 1359 (if (or safe (not index-known-fixnum)) 1360 (multiple-value-setq (src unscaled-idx) 1361 (ppc2-two-untargeted-reg-forms seg vector ppc::arg_y index ppc::arg_z)) 1362 (setq src (ppc2-one-untargeted-reg-form seg vector ppc::arg_z))) 1363 (when safe 1364 (if (typep safe 'fixnum) 1365 (! trap-unless-typecode= src safe)) 1366 (unless index-known-fixnum 1367 (! trap-unless-fixnum unscaled-idx)) 1368 (! check-misc-bound unscaled-idx src)) 1369 (if is-32-bit 1370 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-32-bit-constant-index arch))) 1371 (cond ((eq type-keyword :single-float-vector) 1372 (! misc-ref-c-single-float 0 src index-known-fixnum) 1373 (ensuring-node-target 1374 (target vreg) 1375 (! single->node target 0))) 1376 (t 1377 (ensuring-node-target 1378 (target vreg) 1379 1377 1380 (with-imm-temps () (temp) 1378 1381 (! misc-ref-c-u32 temp src index-known-fixnum) … … 1383 1386 (! box-fixnum target temp)) 1384 1387 (t 1385 (ppc2-box-u32 seg target temp)))))) 1386 (with-imm-temps 1387 () (idx-reg) 1388 (if index-known-fixnum 1389 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) (ash index-known-fixnum 2))) 1390 (! scale-32bit-misc-index idx-reg unscaled-idx)) 1391 (cond ((eq type-keyword :single-float-vector) 1392 (! misc-ref-single-float 0 src idx-reg) 1393 (! single->node target 0)) 1394 (t (with-imm-temps 1395 (idx-reg) (temp) 1396 (! misc-ref-u32 temp src idx-reg) 1397 (case type-keyword 1398 (:signed-32-bit-vector 1399 (ppc2-box-s32 seg target temp)) 1400 (:fixnum-vector 1401 (! box-fixnum target temp)) 1402 (t 1403 (ppc2-box-u32 seg target temp)))))))) 1404 (if is-8-bit 1405 (with-imm-temps 1406 () (temp) 1407 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-8-bit-constant-index arch))) 1408 (! misc-ref-c-u8 temp src index-known-fixnum) 1409 (with-imm-temps 1410 () (idx-reg) 1411 (if index-known-fixnum 1412 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) index-known-fixnum)) 1413 (! scale-8bit-misc-index idx-reg unscaled-idx)) 1414 (! misc-ref-u8 temp src idx-reg))) 1415 (if (eq type-keyword :unsigned-8-bit-vector) 1416 (! u8->fixnum target temp) 1388 (ppc2-box-u32 seg target temp))))))) 1389 (with-imm-temps 1390 () (idx-reg) 1391 (if index-known-fixnum 1392 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) (ash index-known-fixnum 2))) 1393 (! scale-32bit-misc-index idx-reg unscaled-idx)) 1394 (cond ((eq type-keyword :single-float-vector) 1395 (! misc-ref-single-float 0 src idx-reg) 1396 (ensuring-node-target 1397 (target vreg) 1398 (! single->node target 0))) 1399 (t 1400 (ensuring-node-target 1401 (target vreg) 1402 (with-imm-temps 1403 (idx-reg) (temp) 1404 (! misc-ref-u32 temp src idx-reg) 1405 (case type-keyword 1406 (:signed-32-bit-vector 1407 (ppc2-box-s32 seg target temp)) 1408 (:fixnum-vector 1409 (! box-fixnum target temp)) 1410 (t 1411 (ppc2-box-u32 seg target temp))))))))) 1412 (if is-8-bit 1413 (with-imm-temps 1414 () (temp) 1415 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-8-bit-constant-index arch))) 1416 (! misc-ref-c-u8 temp src index-known-fixnum) 1417 (with-imm-temps 1418 () (idx-reg) 1419 (if index-known-fixnum 1420 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) index-known-fixnum)) 1421 (! scale-8bit-misc-index idx-reg unscaled-idx)) 1422 (! misc-ref-u8 temp src idx-reg))) 1423 (if (eq type-keyword :unsigned-8-bit-vector) 1424 (if (= vreg-mode hard-reg-class-gpr-mode-u8) 1425 (ppc2-copy-register seg vreg temp) 1426 (ensuring-node-target (target vreg) 1427 (! u8->fixnum target temp))) 1428 (ensuring-node-target (target vreg) 1417 1429 (if (eq type-keyword :signed-8-bit-vector) 1418 1430 (! s8->fixnum target temp) 1419 (! u8->char target temp)))) 1420 (if is-16-bit 1431 (! u8->char target temp))))) 1432 (if is-16-bit 1433 (ensuring-node-target (target vreg) 1434 1421 1435 (with-imm-temps 1422 1436 () (temp) … … 1434 1448 (if (eq type-keyword :signed-16-bit-vector) 1435 1449 (! s16->fixnum target temp) 1436 (! u8->char target temp)))) 1437 ;; Down to the dregs. 1438 (if is-64-bit 1450 (! u8->char target temp))))) 1451 ;; Down to the dregs. 1452 (if is-64-bit 1453 (ensuring-node-target (target vreg) 1439 1454 (ecase type-keyword 1440 1455 (:double-float-vector … … 1450 1465 (:unsigned-64-bit-vector 1451 1466 (with-imm-target () (u64-reg :u64) 1452 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-64-bit-constant-index arch)))1453 (! misc-ref-c-u64 u64-reg src index-known-fixnum)1454 (with-imm-temps1455 (u64-reg) (idx-reg)1456 (if index-known-fixnum1457 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) (ash index-known-fixnum 3)))1458 (! scale-64bit-misc-index idx-reg unscaled-idx))1459 (! misc-ref-u64 u64-reg src idx-reg)))1460 (! u64->integer target u64-reg)))1467 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-64-bit-constant-index arch))) 1468 (! misc-ref-c-u64 u64-reg src index-known-fixnum) 1469 (with-imm-temps 1470 (u64-reg) (idx-reg) 1471 (if index-known-fixnum 1472 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) (ash index-known-fixnum 3))) 1473 (! scale-64bit-misc-index idx-reg unscaled-idx)) 1474 (! misc-ref-u64 u64-reg src idx-reg))) 1475 (! u64->integer target u64-reg))) 1461 1476 ((:signed-64-bit-vector :fixnum-vector) 1462 1477 (with-imm-target () (s64-reg :s64) 1463 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-64-bit-constant-index arch))) 1464 (! misc-ref-c-s64 s64-reg src index-known-fixnum) 1465 (with-imm-temps 1466 () (idx-reg) 1467 (if index-known-fixnum 1468 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) (ash index-known-fixnum 3))) 1469 (! scale-64bit-misc-index idx-reg unscaled-idx)) 1470 (! misc-ref-s64 s64-reg src idx-reg))) 1471 (if (eq type-keyword :fixnum-vector) 1472 (! box-fixnum target s64-reg) 1473 (! s64->integer target s64-reg))))) 1474 (progn 1475 (unless is-1-bit 1476 (nx-error "~& unsupported vector type: ~s" 1477 type-keyword)) 1478 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-64-bit-constant-index arch))) 1479 (! misc-ref-c-s64 s64-reg src index-known-fixnum) 1480 (with-imm-temps 1481 () (idx-reg) 1482 (if index-known-fixnum 1483 (ppc2-absolute-natural seg idx-reg nil (+ (arch::target-misc-data-offset arch) (ash index-known-fixnum 3))) 1484 (! scale-64bit-misc-index idx-reg unscaled-idx)) 1485 (! misc-ref-s64 s64-reg src idx-reg))) 1486 (if (eq type-keyword :fixnum-vector) 1487 (! box-fixnum target s64-reg) 1488 (! s64->integer target s64-reg)))))) 1489 (progn 1490 (unless is-1-bit 1491 (nx-error "~& unsupported vector type: ~s" 1492 type-keyword)) 1493 (ensuring-node-target (target vreg) 1478 1494 (if (and index-known-fixnum (<= index-known-fixnum (arch::target-max-1-bit-constant-index arch))) 1479 1495 (! misc-ref-c-bit-fixnum target src index-known-fixnum) … … 3250 3266 (case src-mode 3251 3267 (#.hard-reg-class-gpr-mode-node 3252 (! unbox-u8 dest src)) 3268 (if *ppc2-reckless* 3269 (! %unbox-u8 dest src) 3270 (! unbox-u8 dest src))) 3253 3271 (t 3254 3272 (unless (eql dest-gpr src-gpr) … … 3368 3386 (case src-mode 3369 3387 (#.hard-reg-class-gpr-mode-node 3370 (! unbox-u8 dest src)) 3388 (if *ppc2-reckless* 3389 (! %unbox-u8 dest src) 3390 (! unbox-u8 dest src))) 3371 3391 (t 3372 3392 (unless (eql dest-gpr src-gpr) … … 5712 5732 (progn 5713 5733 (ensuring-node-target (target vreg) 5714 (! fixnum->char target (ppc2-one-untargeted-reg-form seg c ppc::arg_z))) 5734 (with-imm-target () (dest :u8) 5735 (! u8->char target (let* ((*ppc2-reckless* t)) 5736 (ppc2-one-untargeted-reg-form seg c dest))))) 5715 5737 (^)))) 5716 5738
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