Changeset 15121


Ignore:
Timestamp:
Dec 8, 2011, 6:23:53 PM (8 years ago)
Author:
gb
Message:

In ARM2-COPY-REGISTER: check more thoroughly that source and dest
FPR are the same (must be same mode). If copying from a single-float
to a double-float, observe *ARM2-FLOAT-SAFETY*.

In ARM2-%SINGLE-TO-DOUBLE, actually copy/coerce to a DOUBLE-FLOAT.
(This isn't the PPC, apparently.)

File:
1 edited

Legend:

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Added
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  • trunk/source/compiler/ARM/arm2.lisp

    r15111 r15121  
    39213921                          (! single->node dest src))))))
    39223922                  (if (and src-fpr dest-fpr)
    3923                     (unless (eql dest-fpr src-fpr)
     3923                    (unless (and (eql dest-fpr src-fpr)
     3924                                 (eql dest-mode src-mode))
    39243925                      (case src-mode
    39253926                        (#.hard-reg-class-fpr-mode-single
     
    39283929                            (! single-to-single dest src))
    39293930                           (#.hard-reg-class-fpr-mode-double
    3930                             (! single-to-double dest src))))
     3931                            (if *arm2-float-safety*
     3932                              (! single-to-double-safe dest src)
     3933                              (! single-to-double dest src)))))
    39313934                        (#.hard-reg-class-fpr-mode-double
    39323935                         (case dest-mode
     
    91559158  (if (null vreg)
    91569159    (arm2-form seg vreg xfer arg)
    9157     (if (and (= (hard-regspec-class vreg) hard-reg-class-fpr)
    9158              (= (get-regspec-mode vreg) hard-reg-class-fpr-mode-double))
    9159       (progn
    9160         (arm2-one-untargeted-reg-form
    9161          seg arg
    9162          (make-wired-lreg (hard-regspec-value vreg)
    9163                           :class hard-reg-class-fpr
    9164                           :mode hard-reg-class-fpr-mode-single))
    9165         (^))
    9166       (with-fp-target () (sreg :single-float)
    9167         (arm2-one-targeted-reg-form seg arg sreg)
    9168         (<- (set-regspec-mode sreg hard-reg-class-fpr-mode-double))
    9169         (^)))))
     9160    (with-fp-target () (sreg :single-float)
     9161      (setq sreg (arm2-one-untargeted-reg-form seg arg sreg))
     9162      (if (and (= (hard-regspec-class vreg) hard-reg-class-fpr)
     9163               (= (get-regspec-mode vreg) hard-reg-class-fpr-mode-double))
     9164        (<- sreg)
     9165        (with-fp-target (sreg) (dreg :double-float)
     9166          (arm2-copy-register seg dreg sreg)
     9167          (<- dreg)))
     9168      (^))))
    91709169
    91719170(defarm2 arm2-%symptr->symvector %symptr->symvector (seg vreg xfer arg)
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