Ignore:
Timestamp:
Aug 31, 2011, 10:11:12 AM (8 years ago)
Author:
gb
Message:

Treat s28-s31 (save0-save3) as non-volatile node-bearing regs; it
may be cheaper to access values in such registers than it would be
to access memory.

When entering lisp context (thread entry/callback), save all non-volatile
FP regs (d8-d15) and load benign values into s28-s31. When creating a
lisp catch frame, save d8-d13 in a stack-consed vector and s28-s31 in
new slots in the catch frame.

C code only needs to know about catch frame layout to support thread
reset from C, and that hasn't worked in a long time. If C code ever
needs this info, should define the ARM (not PPC) version.

On Linux, vfp state is maintained as a tagged record in the
uc_regspace field of a ucontext stucture; there can be other tagged
records (Marvell CPUs may contain iwmmxt info, for instance.) Some
comments in header files (somewhere) suggest that only certain
exception contexts contain vfp state; other comments suggest that
those comments have been bogus for a long time. This whole scheme
obviously depends on the GC being able to find non-null VFP info in
any exception context it processes. mark_xp() checks for that and enters
the kernel debugger if it's missing; forward_xp() assumes that mark_xp()
has checked.

Make the l and r kernel debugger commands print the values of save0-save3
and make the f command ignore them.

Since the lisp side of things is (currently) blissfully unaware of all
this, save0-save3 should (at the moment) always contain "benign values"
(0).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/source/lisp-kernel/arm-exceptions.c

    r14876 r14965  
    610610reset_lisp_process(ExceptionInformation *xp)
    611611{
     612#if 0
    612613  TCR *tcr = get_tcr(true);
    613614  catch_frame *last_catch = (catch_frame *) ptr_from_lispobj(untag(tcr->catch_top));
     
    618619
    619620  start_lisp(tcr, 1);
     621#endif
    620622}
    621623
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