Changeset 13897 for branches/arm/level-1/l1-boot-3.lisp

Timestamp:

Jun 28, 2010, 10:43:56 PM (11 years ago)

Author:

gb

Message:

arm-asm.lisp, arm-lap.lisp: drain-constant-pool. At least slightly
better than nothing. Check to make sure that :mem12 pc-relative label
references are within 12 bits of their target.

arm-backend: uncomment code to require arm-vinsns

arm-disassemble: hook up to DISASSEMBLE.

arm-vinsns: in REQUIRE-U32, get subtag from the right place.

arm2.lisp: assume that .SPprogvsave sets up an unwind-protect.

arm-bignum.lisp: %ADD-THE-CARRRY is indeed silly.

arm-misc.lisp: unscramble %UNLOCK-GC-LOCK, don't clobber address
in %PTR-STORE-FIXNUM-CONDITIONAL.

arm-utils.lisp: GC.

l1-boot-1.lisp: add ARM to PLATFORM-CPU-NAMES.

l1-boot-2.lisp: require disassembler, lapmacros files on ARM.

l1-boot-3.lisp: comment out error-callback activation on ARM.

l1-init.lisp: set *SAVE-SOURCE-LOCATIONS* to NIL on ARM for now. (More code
to step through/debug, and not short of that.)

version.lisp: don't say "arm-cross" if #+arm-target.

arm-gc.c: get a lot of this working, seemingly.

arm-macros.s: fix skip_stack_vector.

arm-spentry.s: get PROGV support working.

gc-common.c: check static-cons freelist only if GCDebug.

linuxarm/Makefile: enable GC integrity checks.

lisp-debug.c: start to support 'describe exception" for ARM.

File:

• branches/arm/level-1/l1-boot-3.lisp (modified) (1 diff)

branches/arm/level-1/l1-boot-3.lisp

@@ -26 +26 @@
 )
 
+#+arm-target
+(eval-when (:compile-toplevel)
+  (warn "Remember to reenable error callbacks."))
 (set-periodic-task-interval .33)
-(setq cmain xcmain)
-(setq %err-disp %xerr-disp)
+#-arm-target (setq cmain xcmain)
+#-arm-target (setq %err-disp %xerr-disp)
 
 ;;;end of l1-boot-3.lisp