Changeset 10622


Ignore:
Timestamp:
Sep 8, 2008, 2:37:08 AM (11 years ago)
Author:
gb
Message:

rearrange/reorganize (in store_node_conditional, set_hash_key_conditional)
to interact better with pc_luser_xp.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • branches/gz/lisp-kernel/ppc-spentry.s

    r10615 r10622  
    606606        __(blr)
    607607       
    608 /* This is a little trickier: the first instruction clears the EQ bit in CR0; */
    609 /* the only way that it can get set is if the conditional store succeeds.   */
    610 /* So: */
    611 /*   a) if we're interrupted on the first instruction, or if we're  */
    612 /*      interrupted on a subsequent instruction but CR0[EQ] is clear, the  */
    613 /*      condtional store hasn't succeeded yet.  We don't have to adjust the  */
    614 /*      PC in this case; when the thread's resumed, the conditional store */
    615 /*      will be (re-)attempted and will eventually either succeed or fail. */
    616 /*   b) if the CR0[EQ] bit is set (on some instruction other than the first), */
    617 /*      the handler can decide if/how to handle memoization.  The handler */
    618 /*      should set the PC to the LR, and set arg_z to T. */
    619 
     608
     609/*
     610   Interrupt handling (in pc_luser_xp()) notes:
     611   If we are in this function and before the test which follows the
     612   conditional (at egc_store_node_conditional), or at that test
     613   and cr0[eq] is clear, pc_luser_xp() should just let this continue
     614   (we either haven't done the store conditional yet, or got a
     615   possibly transient failure.)  If we're at that test and the
     616   cr0[EQ] bit is set, then the conditional store succeeded and
     617   we have to atomically memoize the possible intergenerational
     618   reference.  Note that the local labels 4 and 5 are in the
     619   body of the next subprim (and at or beyond 'egc_write_barrier_end').
     620
     621   N.B: it's not possible to really understand what's going on just
     622   by the state of the cr0[eq] bit.  A transient failure in the
     623   conditional stores that handle memoization might clear cr0[eq]
     624   without having completed the memoization.
     625*/
    620626        .globl C(egc_store_node_conditional)
    621627        .globl C(egc_write_barrier_end)
    622628_spentry(store_node_conditional)
    623629C(egc_store_node_conditional):
    624         __(crclr 2)              /* 2 = cr0_EQ  */
    625630        __(cmplr(cr2,arg_z,arg_x))
    626631        __(vpop(temp0))
    627632        __(unbox_fixnum(imm4,temp0))
    6286331:      __(lrarx(temp1,arg_x,imm4))
    629         __(cmpr(cr1,temp1,arg_y))
    630         __(bne cr1,3f)
     634        __(cmpr(cr1,temp1,arg_y))       
     635        __(bne cr1,5f)
    631636        __(strcx(arg_z,arg_x,imm4))
    632         .globl C(store_node_conditonal_test)
    633 C(store_node_conditonal_test): 
     637        .globl C(egc_store_node_conditional_test)
     638C(egc_store_node_conditional_test):     
    634639        __(bne 1b)
    635640        __(isync)
     
    645650        __(srr(imm3,imm3,imm2))
    646651        __(ref_global(imm2,refbits))
    647         __(bge 5f)
     652        __(bge 4f)
    648653        __(slri(imm0,imm0,word_shift))
    6496542:      __(lrarx(imm1,imm2,imm0))
     
    652657        __(bne- 2b)
    653658        __(isync)
    654         __(b 5f)
    655 3:      __(li imm0,RESERVATION_DISCHARGE)
    656         __(strcx(rzero,0,imm0))
    657 4:      __(li arg_z,nil_value)
    658         __(blr)
    659 5:      __(li arg_z,t_value)
    660         __(blr)
     659        __(b 4f)
    661660
    662661/* arg_z = new value, arg_y = expected old value, arg_x = hash-vector,
    663    vsp[0] = (boxed) byte-offset */
     662   vsp[0] = (boxed) byte-offset
     663   Interrupt-related issues are as in store_node_conditional, but
     664   we have to do more work to actually do the memoization.*/
    664665_spentry(set_hash_key_conditional)
    665666        .globl C(egc_set_hash_key_conditional)
    666667C(egc_set_hash_key_conditional):
    667         __(crclr 2)             /* 2 = cr0_EQ */
    668668        __(cmplr(cr2,arg_z,arg_x))
    669669        __(vpop(imm4))
     
    6716711:      __(lrarx(temp1,arg_x,imm4))
    672672        __(cmpr(cr1,temp1,arg_y))
    673         __(bne cr1,4f)
     673        __(bne cr1,5f)
    674674        __(strcx(arg_z,arg_x,imm4))
    675675        .globl C(egc_set_hash_key_conditional_test)
     
    688688        __(srr(imm3,imm3,imm2))
    689689        __(ref_global(imm2,refbits))
    690         __(bge 5f)
     690        __(bge 4f)
    691691        __(slri(imm0,imm0,word_shift))
    6926922:      __(lrarx(imm1,imm2,imm0))
     
    694694        __(strcx(imm1,imm2,imm0))
    695695        __(bne- 2b)
     696        __(isync)
    696697        /* Memoize hash table header */         
    697698        __(ref_global(imm1,heap_start))
     
    705706        __(ldrx(imm1,imm2,imm0))
    706707        __(and. imm1,imm1,imm3)
    707         __(bne 5f)
     708        __(bne 4f)
    7087093:      __(lrarx(imm1,imm2,imm0))
    709710        __(or imm1,imm1,imm3)
     
    711712        __(bne- 3b)
    712713        __(isync)
    713         __(b 5f)
    714 4:      __(li imm0,RESERVATION_DISCHARGE)
     714C(egc_write_barrier_end):
     7154:      __(li arg_z,t_value)
     716        __(blr)
     7175:      __(li imm0,RESERVATION_DISCHARGE)
    715718        __(strcx(rzero,0,imm0))
    716 C(egc_write_barrier_end):
    717719        __(li arg_z,nil_value)
    718         __(blr)
    719 5:      __(li arg_z,t_value)
    720720        __(blr)
    721721       
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