1 | /* |
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2 | * Copyright 1994-2009 Clozure Associates |
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3 | * |
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4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
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5 | * you may not use this file except in compliance with the License. |
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6 | * You may obtain a copy of the License at |
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7 | * |
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8 | * http://www.apache.org/licenses/LICENSE-2.0 |
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9 | * |
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10 | * Unless required by applicable law or agreed to in writing, software |
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11 | * distributed under the License is distributed on an "AS IS" BASIS, |
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12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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13 | * See the License for the specific language governing permissions and |
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14 | * limitations under the License. |
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15 | */ |
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16 | |
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17 | .syntax unified |
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18 | .arm |
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19 | |
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20 | include(lisp.s) |
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21 | |
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22 | _beginfile |
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23 | |
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24 | /* Force data from r0, size r1 into the icache */ |
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25 | _exportfn(C(flush_cache_lines)) |
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26 | __ifdef(`LINUX') |
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27 | __(add r1,r1,r0) |
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28 | __(mov r2,#0) /* options. Pass as 0 until we know better */ |
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29 | __(mov r12,r7) /* preserve r7 ; r12 saved by syscall */ |
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30 | __(mov r7,#0x0f0000) /* __ARM_NR_cacheflush */ |
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31 | __(add r7,r7,#2) |
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32 | __(svc #0) |
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33 | __(mov r7,r12) |
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34 | __endif |
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35 | __ifdef(`DARWIN') |
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36 | __(mov r3,#0) |
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37 | __(mov r12,#0x80000000) |
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38 | __(svc #0) |
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39 | __endif |
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40 | __(bx lr) |
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41 | |
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42 | _exportfn(C(touch_page)) |
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43 | __(str r0,[r0,#0]) |
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44 | __(mov r1,#0) |
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45 | __(str r1,[r0,#0]) |
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46 | __(mov r0,#1) |
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47 | .globl C(touch_page_end) |
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48 | C(touch_page_end): |
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49 | __(bx lr) |
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50 | _endfn |
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51 | |
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52 | _exportfn(C(current_stack_pointer)) |
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53 | __(mov r0,sp) |
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54 | __(bx lr) |
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55 | _endfn |
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56 | |
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57 | _exportfn(C(count_leading_zeros)) |
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58 | __(clz r0,r0) |
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59 | __(bx lr) |
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60 | _endfn |
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61 | |
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62 | _exportfn(C(noop)) |
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63 | __(bx lr) |
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64 | _endfn |
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65 | |
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66 | |
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67 | |
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68 | |
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69 | |
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70 | /* Atomically store new value (r2) in *r0, if old value == expected (r1). */ |
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71 | /* Return actual old value. */ |
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72 | .globl C(arm_architecture_version) |
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73 | _exportfn(C(store_conditional)) |
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74 | 0: __(ldrex r3,[r0]) |
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75 | __(cmp r3,r1) |
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76 | __(bne 1f) |
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77 | __(strex ip,r2,[r0]) |
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78 | __(cmp ip,#0) |
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79 | __(bne 0b) |
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80 | __(b 2f) |
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81 | 1: |
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82 | __(ldr r2,.L555) |
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83 | .LPIC0: |
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84 | __(add r2,pc,r2) |
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85 | __(ldr ip,.L555+4) |
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86 | __(ldr ip,[r2,ip]) |
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87 | __(ldr ip,[ip]) |
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88 | __(cmp ip,#7) |
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89 | __(blt 2f) |
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90 | .long 0xf57ff01f |
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91 | 2: __(mov r0,r3) |
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92 | __(bx lr) |
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93 | .L555: |
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94 | .word _GLOBAL_OFFSET_TABLE_-(.LPIC0+8) |
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95 | .word C(arm_architecture_version)(GOT) |
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96 | |
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97 | |
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98 | |
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99 | |
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100 | |
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101 | |
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102 | |
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103 | |
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104 | |
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105 | |
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106 | |
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107 | |
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108 | |
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109 | |
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110 | |
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111 | |
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112 | |
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113 | |
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114 | |
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115 | |
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116 | |
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117 | |
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118 | |
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119 | |
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120 | |
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121 | _endfn |
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122 | |
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123 | /* Atomically store new_value(r1) in *r0 ; return previous contents */ |
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124 | /* of *r0. */ |
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125 | |
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126 | _exportfn(C(atomic_swap)) |
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127 | __(mov r2,r0) |
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128 | 0: __(ldrex r0,[r2]) |
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129 | __(strex r3,r1,[r2]) |
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130 | __(cmp r3,#0) |
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131 | __(bne 0b) |
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132 | __(bx lr) |
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133 | _endfn |
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134 | |
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135 | _exportfn(C(atomic_swap_acquire)) |
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136 | __(mov r2,r0) |
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137 | 0: __(ldrex r0,[r2]) |
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138 | __(strex r3,r1,[r2]) |
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139 | __(cmp r3,#0) |
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140 | __(wfene) |
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141 | __(bne 0b) |
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142 | __(dmb) |
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143 | __(bx lr) |
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144 | _endfn |
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145 | |
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146 | _exportfn(C(release_spin_lock)) |
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147 | __(mov r1,#0) |
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148 | __(dmb) |
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149 | __(str r1,[r0]) |
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150 | __(dsb) |
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151 | __(sev) |
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152 | __(bx lr) |
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153 | _endfn |
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154 | |
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155 | |
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156 | /* Logior the value in *r0 with the value in r1 (presumably a bitmask with exactly 1 */ |
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157 | /* bit set.) Return non-zero if any of the bits in that bitmask were already set. */ |
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158 | |
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159 | _exportfn(C(atomic_ior)) |
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160 | __(stmdb sp!,{r4,lr}) |
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161 | 0: __(ldrex r2,[r0]) |
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162 | __(orr r3,r2,r1) |
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163 | __(strex r4,r3,[r0]) |
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164 | __(cmp r4,#0) |
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165 | __(bne 0b) |
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166 | __(mov r0,r2) |
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167 | __(ldmia sp!,{r4,pc}) |
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168 | _endfn |
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169 | |
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170 | |
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171 | /* Logand the value in *r0 with the value in r1 (presumably a bitmask with exactly 1 */ |
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172 | /* bit set.) Return the value now in *r0 (for some value of "now" */ |
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173 | |
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174 | _exportfn(C(atomic_and)) |
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175 | 0: __(ldrex r2,[r0]) |
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176 | __(and r2,r2,r1) |
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177 | __(strex r3,r2,[r0]) |
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178 | __(cmp r3,#0) |
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179 | __(bne 0b) |
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180 | __(mov r0,r2) |
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181 | __(bx lr) |
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182 | _endfn |
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183 | |
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184 | |
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185 | __ifdef(`DARWIN') |
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186 | _exportfn(C(enable_fp_exceptions)) |
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187 | __(.long 0) |
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188 | __(bx lr) |
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189 | _endfn |
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190 | |
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191 | _exportfn(C(disable_fp_exceptions)) |
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192 | __(.long 0) |
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193 | __(bx lr) |
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194 | _endfn |
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195 | |
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196 | _exportfn(C(pseudo_sigreturn)) |
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197 | __(uuo_pseudo_sigreturn()) |
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198 | __(b C(pseudo_sigreturn)) |
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199 | _endfn |
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200 | __endif |
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201 | |
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202 | _exportfn(C(save_fp_context)) |
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203 | __(uuo_debug_trap(al)) |
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204 | _endfn |
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205 | _exportfn(C(restore_fp_context)) |
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206 | __(uuo_debug_trap(al)) |
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207 | _endfn |
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208 | _exportfn(C(put_vector_registers)) |
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209 | __(uuo_debug_trap(al)) |
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210 | _endfn |
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211 | _exportfn(C(get_vector_registers)) |
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212 | __(uuo_debug_trap(al)) |
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213 | _endfn |
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214 | |
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215 | __ifdef(`ANDROID') |
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216 | _exportfn(rt_sigprocmask) |
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217 | __(stmdb sp!,{r7,lr}) |
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218 | __(mov r7,#175) |
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219 | __(svc #0) |
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220 | __(ldmia sp!,{r7,pc}) |
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221 | _endfn |
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222 | __endif |
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223 | |
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224 | |
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225 | __ifdef(`DARWIN') |
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226 | /* divide the 64-bit unsigned integer in r0/r1 by the 64-bit unsigned |
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227 | integer in r2/r3; return the 64-bit quotient in r0/r1 and the 64-bit |
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228 | remainder in r2/r3. Implement this in terms of the libgcc function: |
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229 | |
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230 | unsigned long long __udivti3 (unsigned long long a, |
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231 | unsigned long long b, |
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232 | unsigned long long *c) |
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233 | */ |
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234 | _exportfn(C(__aeabi_uldivmod)) |
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235 | __(stmdb sp!,{r7,lr}) |
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236 | __(mov r7,sp) |
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237 | __(sub sp,sp,#8) |
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238 | __(mov ip,sp) |
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239 | __(push1(ip,sp)) |
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240 | __(push1(ip,sp)) |
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241 | __(bl C(__udivmoddi4)) |
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242 | __(add sp,sp,#8) |
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243 | __(ldmia sp!,{r2,r3}) |
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244 | __(ldmia sp!,{r7,pc}) |
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245 | _endfn |
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246 | __endif |
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247 | |
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248 | _exportfn(call_handler_on_main_stack) |
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249 | __(ldr ip,[sp]) |
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250 | __(mov lr,r3) |
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251 | __(mov sp,r1) |
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252 | __(bx ip) |
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253 | _endfn |
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254 | |
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255 | /* zero N (r1) dnodes, starting at the dnode-aligned address in r0 */ |
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256 | _exportfn(C(zero_dnodes)) |
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257 | __(adr r2,9f) |
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258 | __(fldmiad r2,{d0-d7}) |
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259 | __(ands r2,r1,#7) |
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260 | __(sub r1,r1,r2) |
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261 | __(b 1f) |
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262 | 0: __(subs r2,r2,#1) |
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263 | __(fstd d0,[r0]) |
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264 | __(add r0,r0,#dnode_size) |
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265 | 1: __(bne 0b) |
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266 | __(cmp r1,#0) |
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267 | __(b 3f) |
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268 | 2: __(subs r1,r1,#8) |
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269 | __(fstmiad r0!,{d0-d7}) |
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270 | 3: __(bne 2b) |
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271 | __(bx lr) |
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272 | .align 3 |
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273 | 9: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 |
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274 | _endfn |
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275 | |
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276 | _exportfn(C(dmb)) |
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277 | __(dmb) |
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278 | __(bx lr) |
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279 | _endfn |
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280 | |
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281 | _exportfn(C(dsb)) |
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282 | __(dsb) |
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283 | __(bx lr) |
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284 | _endfn |
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285 | _exportfn(C(isb)) |
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286 | __(isb) |
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287 | __(bx lr) |
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288 | _endfn |
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289 | |
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290 | |
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291 | |
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292 | _exportfn(C(feature_check)) |
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293 | .globl C(feature_check_ldrex) |
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294 | .globl C(feature_check_clrex) |
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295 | .globl C(feature_check_fpu) |
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296 | C(feature_check_fpu): |
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297 | __(fcmpd d15,d15) |
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298 | C(feature_check_ldrex): |
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299 | __(ldrex r2,[sp]) |
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300 | C(feature_check_clrex): |
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301 | __(.long 0xf57ff01f) /* clrex */ |
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302 | __(bx lr) |
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303 | _endfn |
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304 | _endfile |
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305 | |
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