source: trunk/source/level-0/ARM/arm-symbol.lisp @ 15601

Last change on this file since 15601 was 15093, checked in by gb, 8 years ago

New Linux ARM binaries.

The image and FASL versions changed on the ARM, but (if I did it right)
not on other platforms.

(The image and FASL versions are now architecture-specific. This may
make it somewhat easier and less disruptive to change them, since the
motivation for such a change is often also architecture-specific.)
The FASL and current image version are defined (in the "TARGET" package)
in the architecture-specific *-arch.lisp files; the min, max, and current
image versions are defined in the *constants*.h file for the architecture.

Most of the changes are ARM-specific.

Each TCR now contains a 256-word table at byte offset 256. (We've
been using about 168 bytes in the TCR, so there are still 88 bytes/22
words left for expansion.) The table is initialized at TCR-creation
time to contain the absolute addresses of the subprims (there are
currently around 130 defined); we try otherwise not to reference
subprims by absolute address. Jumping to a subprim is:

(ldr pc (:@ rcontext (:$ offset-of-subprim-in-tcr-table)))

and calling one involves loading its address from that table into a
register and doing (blx reg). We canonically use LR as the register,
since it's going to be clobbered by the blx anyway and there doesn't
seem to be a performance hazard there. The old scheme (which involved
using BA and BLA pseudoinstructions to jump to/call a hidden jump table
at the end of the function) is no longer supported.

ARM Subprims no longer need to be aligned (on anything more than an
instruction boundary.) Some remnants of the consequences of an old
scheme (where subprims had to "fit" in small regions and sometimes
had to jump out of line if they would overflow that region's bounds)
still remain, but we can repair that (and it'll be a bit more straightforward
to add new ARM subprims.) We no longer care (much) about where subprims
are mapped in memory, and don't have to bias suprimitive addresses by
a platform-specific constant (and have to figure out whether or not we've
already done so) on (e.g.) Android.

Rather than setting the first element (fn.entrypoint) of a
newly-created function to the (absolute) address of a subprim that updates
that entrypoint on the first call, we use a little LAP function to correct
the address before the function can be called.

Non-function objects that can be stored in symbols' function cells
(the UNDEFINED-FUNCTION object, the things that encapsulate
special-operator names and global macro-functions) need to be
structured like FUNCTIONS: the need to have a word-aligned entrypoint
in element 0 that tracks the CODE-VECTOR object in element 1. We
don't want these things to be of type FUNCTION, but do want the GC to
adjust the entrypoint if the codevector moves. We've been essentially
out of GVECTOR subtags on 32-bit platforms, largely because of the
constraints that vector/array subtags must be greater than other
subtags and numeric types be less. The first constraint is probably
reasonable, but the second isn't: other typecodes (tag-list, etc) may
be less than the maximum numeric typecode, so tests like NUMBERP can't
reliably involve a simple comparison. (As long as a mask of all
numeric typecodes will fit in a machine word/FIXNUM, a simple LOGBITP
test can be used instead.) Removed all portable and ARM-specific code
that made assumptions about numeric typecode ordering, made a few more
gvector typecodes available, and used one of them to define a new
"pseudofunction" type. Made the GC update the entrypoints of
pseudofunctions and used them for the undefined-function object and
for the function cells of macros/special-operators.

Since we don't need the subprim jump table at the end of each function
anymore, we can more easily revive the idea of embedded pc-relative
constant data ("constant pools") and initialize FPRs from constant
data, avoiding most remaining traffic between FPRs and GPRs.

I've had a fairly-reproducible cache-coherency problem: on the first
GC in the cold load, the thread misbehaves mysteriously when it
resumes. The GC tries to synchronize the I and D caches on the entire
range of addresses that may contain newly-moved code-vectors. I'm not
at all sure why, but walking that range and flushing the cache for
each code-vector individually seems to avoid the problem (and may actually
be faster.)

Fix ticket:894

Fixed a few typos in error messages/comments/etc.

I -think- that the non-ARM-specific changes (how FASL/image versions are
defined) should bootstrap cleanly, but won't know for sure until this is
committed. (I imagine that the buildbot will complain if not.)

File size: 4.6 KB
Line 
1;;;-*- Mode: Lisp; Package: CCL -*-
2;;;
3;;;   Copyright (C) 2009 Clozure Associates
4;;;   Copyright (C) 1994-2001 Digitool, Inc
5;;;   This file is part of Clozure CL. 
6;;;
7;;;   Clozure CL is licensed under the terms of the Lisp Lesser GNU Public
8;;;   License , known as the LLGPL and distributed with Clozure CL as the
9;;;   file "LICENSE".  The LLGPL consists of a preamble and the LGPL,
10;;;   which is distributed with Clozure CL as the file "LGPL".  Where these
11;;;   conflict, the preamble takes precedence. 
12;;;
13;;;   Clozure CL is referenced in the preamble as the "LIBRARY."
14;;;
15;;;   The LLGPL is also available online at
16;;;   http://opensource.franz.com/preamble.html
17
18(in-package "CCL")
19
20(eval-when (:compile-toplevel :execute)
21  (require "ARM-ARCH")
22  (require "ARM-LAPMACROS"))
23
24;;; This assumes that macros & special-operators
25;;; have something that's not FUNCTIONP in their
26;;; function-cells.
27(defarmlapfunction %function ((sym arg_z))
28  (check-nargs 1)
29  (let ((symptr temp0)
30        (symbol temp1)
31        (def arg_z))
32    (cmp sym 'nil)
33    (mov symbol sym)
34    (mov symptr (:$ arm::nil-value))
35    (add symptr symptr (:$ arm::nilsym-offset))
36    (beq @ref)
37    (trap-unless-xtype= sym arm::subtag-symbol)
38    (mov symptr sym)
39    @ref
40    (ldr def (:@ symptr (:$ arm::symbol.fcell)))
41    (extract-typecode imm0 def)
42    (cmp imm0 (:$ arm::subtag-function))
43    (bxeq lr)
44    (uuo-error-udf symbol)
45    (bx lr)))
46
47
48
49;;; Traps unless sym is NIL or some other symbol.
50;;; On ARM, NIL isn't really a symbol; this function maps from NIL
51;;; to an internal proxy symbol ("nilsym").
52(defarmlapfunction %symbol->symptr ((sym arg_z))
53  (cmp sym 'nil)
54  (addeq sym sym (:$ arm::nilsym-offset))
55  (bxeq lr)
56  (trap-unless-xtype= sym arm::subtag-symbol)
57  (bx lr))
58
59;;; Traps unless symptr is a symbol; returns NIL if symptr
60;;; is NILSYM.
61(defarmlapfunction %symptr->symbol ((symptr arg_z))
62  (mov imm1 (:$ arm::nil-value))
63  (add imm1 imm1 (:$ arm::nilsym-offset))
64  (cmp imm1 symptr)
65  (moveq arg_z 'nil)
66  (bxeq lr)
67  (trap-unless-xtype= symptr arm::subtag-symbol)
68  (bx lr))
69
70(defarmlapfunction %symptr-value ((symptr arg_z))
71  (spjump .SPspecref))
72
73(defarmlapfunction %set-symptr-value ((symptr arg_y) (val arg_z))
74  (spjump .SPspecset))
75
76(defarmlapfunction %symptr-binding-address ((symptr arg_z))
77  (ldr imm0 (:@ symptr (:$ arm::symbol.binding-index)))
78  (ldr imm2 (:@ arm::rcontext (:$ arm::tcr.tlb-limit)))
79  (ldr imm1 (:@ arm::rcontext (:$ arm::tcr.tlb-pointer)))
80  (cmp imm0 imm2)
81  (bhs @sym)
82  (ldr temp0 (:@ imm1 imm0))
83  (cmp temp0 (:$ arm::subtag-no-thread-local-binding))
84  (unbox-fixnum imm0 imm0)
85  (beq @sym)
86  (vpush1 imm1)
87  (vpush1 imm0)
88  (set-nargs 2)
89  (add temp0 vsp '2)
90  (spjump .SPvalues)
91  @sym
92  (mov arg_y '#.arm::symbol.vcell)
93  (vpush1 arg_z)
94  (vpush1 arg_y)
95  (set-nargs 2)
96  (add temp0 vsp '2)
97  (spjump .SPvalues))
98
99(defarmlapfunction %tcr-binding-location ((tcr arg_y) (sym arg_z))
100  (ldr imm1 (:@ sym (:$ arm::symbol.binding-index)))
101  (ldr imm2 (:@ tcr (:$ arm::tcr.tlb-limit)))
102  (ldr imm0 (:@ tcr (:$ arm::tcr.tlb-pointer)))
103  (mov arg_z 'nil)
104  (cmp imm1 imm2)
105  (bxhs lr)
106  (ldr  temp0 (:@ imm0 imm1))
107  (cmp  temp0 (:$ arm::subtag-no-thread-local-binding))
108  (bxeq lr)
109  (add arg_z imm0 imm1)
110  (bx lr))
111
112 
113(defarmlapfunction %pname-hash ((str arg_y) (len arg_z))
114  (let ((nextw imm1)
115        (accum imm0)
116        (offset imm2))
117    (cmp len (:$ 0))
118    (mov offset (:$ arm::misc-data-offset))
119    (mov accum (:$ 0))
120    (bxeq lr)
121    @loop
122    (subs len len '1)
123    (ldr nextw (:@ str offset))
124    (add offset offset (:$ 4))
125    (mov accum (:ror accum (:$ 27)))
126    (eor accum accum nextw)
127    (bne @loop)
128    (mov accum (:lsl accum (:$ 5)))
129    (mov arg_z (:lsr accum (:$ (- 5 arm::fixnumshift))))
130    (bx lr)))
131
132(defarmlapfunction %string-hash ((start arg_x) (str arg_y) (len arg_z))
133  (let ((nextw imm1)
134        (accum imm0)
135        (offset imm2))
136    (cmp len (:$ 0))
137    (add offset start (:$ arm::misc-data-offset))
138    (mov accum (:$ 0))
139    (bxeq lr)
140    @loop
141    (subs len len '1)
142    (ldr nextw (:@ str offset))
143    (add offset offset (:$ 4))
144    (mov accum (:ror accum (:$ 27)))
145    (eor accum accum nextw)
146    (bne @loop)
147    (mov accum (:lsl accum (:$ 5)))
148    (mov arg_z (:lsr accum (:$ (- 5 arm::fixnumshift))))
149    (bx lr)))
150
151;;; Ensure that the current thread's thread-local-binding vector
152;;; contains room for an entry with index INDEX.
153;;; Return the fixnum-tagged tlb vector.
154(defarmlapfunction %ensure-tlb-index ((idx arg_z))
155  (ldr arg_y (:@ rcontext (:$ arm::tcr.tlb-limit)))
156  (cmp arg_y idx)
157  (bhi @ok)
158  (uuo-tlb-too-small idx)
159  @ok
160  (ldr arg_z (:@ rcontext (:$ arm::tcr.tlb-pointer)))
161  (bx lr))
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