source: branches/arm/lisp-kernel/ppc-uuo.s @ 13923

Last change on this file since 13923 was 13337, checked in by plkrueger, 10 years ago

Don't change the m4 quoting characters from their defaults (`').
(On the ARM, square brackets are used to denote memory operands, curly
braces surround register lists, and multicharacter quoting delimeters
look funny ...)

Some versions (at least) of m4 are confused by quoting characters in
comments, so try to refrain from using contractions ...

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 3.1 KB
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1/* Copyright (C) 2009 Clozure Associates */
2/* Copyright (C) 1994-2001 Digitool, Inc */
3/* This file is part of Clozure CL. */
4
5/* Clozure CL is licensed under the terms of the Lisp Lesser GNU Public */
6/* License , known as the LLGPL and distributed with Clozure CL as the */
7/* file "LICENSE".  The LLGPL consists of a preamble and the LGPL, */
8/* which is distributed with Clozure CL as the file "LGPL".  Where these */
9/* conflict, the preamble takes precedence. */
10 
11/* Clozure CL is referenced in the preamble as the "LIBRARY." */
12 
13/* The LLGPL is also available online at */
14/* http://opensource.franz.com/preamble.html */
15
16
17
18
19/* A uuo looks like:  */
20/*  0      5 6                  15 16   20 21          27 28  31  */
21/* +--------+-----------------------------+--------------+------+  */
22/* |   0    |XXXXXXXXXXXXXXXXXXXX |  RB   |  <minor op>  |  11  |  */
23/* +--------+-----------------------------+--------------+------+  */
24/*  */
25/* e.g., the major opcode (bits 0-5) is 0, the low 4 bits (bits 28-31)  */
26/* have the value "11" decimal (that's tagged as an immediate as far  */
27/* as lisp is concerned, a 7-bit opcode in bits 21-27, and the format  */
28/* of bits 6-20 depend on the value of the minor opcode, though typically  */
29/* bits 16-20 are used to specify a register value between 0 and 31.  */
30/*  */
31/* There are a few cases where bits 6-15 are also used to denote registers  */
32/* (RT and RA, as in an X-form PPC instruction), some where bits 6-10 are  */
33/* to be interpreted as a constant (error number or type code), and some  */
34/* where bits 6-15 do so.  */
35/*  */
36/* Since C code is typically more interested in disassembling UUOs, the  */
37/* full list of UUOs is in "uuo.h".  This file contains macros for creating  */
38/* them.  */
39/*  */
40/* Of course, there -is- no such file as "uuo.h".  That's a stale comment.  */
41/* For all anyone knows, so is this one.  */
42
43UUO_TAG = 11
44UUU_MINOR_SHIFT = 4
45UUO_RB_SHIFT = 11
46UUO_RA_SHIFT = 16
47UUO_RT_SHIFT = 21
48
49define(`rt_ra_uuo',`
50        .long (UUO_TAG|(($1)<<UUU_MINOR_SHIFT)|(($3)<<UUO_RA_SHIFT)|(($2)<<UUO_RT_SHIFT))')
51
52define(`rt_ra_rb_uuo',`
53        .long (UUO_TAG|(($1)<<UUU_MINOR_SHIFT)|(($3)<<UUO_RA_SHIFT)|(($4)<<UUO_RB_SHIFT)|(($2)<<UUO_RT_SHIFT))')
54       
55define(`errnum_rb_uuo',`
56        .long (UUO_TAG|(($1)<<UUU_MINOR_SHIFT)|(($2)<<UUO_RA_SHIFT)|(($3)<<UUO_RB_SHIFT))')
57       
58define(`errnum_ra_rb_uuo',` /* minorop,errnum,ra,rb */
59        .long (UUO_TAG|(($1)<<UUU_MINOR_SHIFT)|(($2)<<UUO_RA_SHIFT)|(($3)<<UUO_RB_SHIFT)|((\errnum)<<UUO_RT_SHIFT))')
60       
61       
62       
63/* Signal an internal error - type error or whatever - with error   */
64/* number (0-1023) and "register" argument.  */
65
66define(`uuo_interr',`
67        errnum_rb_uuo(11,$1,$2)')
68       
69/* As above, but make the error continuable.  (A branch presumably  */
70/* follows the UUO opcode.)  */
71
72define(`uuo_intcerr',`
73        errnum_rb_uuo(12,$1,$2)')
74
75
76/* Signal an error with a much smaller error number (0-31) and  */
77/* two "register" fields.  */
78
79define(`uuo_interr2',`
80        errnum_ra_rb_uuo(13,$1,$2,$3)')
81       
82/* Continuably ....  */
83
84define(`uuo_intcerr2',`
85        errnum_ra_rb_uuo(14,$1,$2,$3)')
86
87       
88
89/* A distinguished UUO: the handler should zero the FPSCR  */
90define(`uuo_zero_fpscr',`
91        rt_ra_rb_uuo(25,0,0,0)')
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