| 1 | ;;;-*- Mode: Lisp; Package: CCL -*-
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| 2 | ;;;
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| 3 | ;;; Copyright (C) 1994-2001 Digitool, Inc
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| 4 | ;;; This file is part of OpenMCL.
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| 5 | ;;;
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| 6 | ;;; OpenMCL is licensed under the terms of the Lisp Lesser GNU Public
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| 7 | ;;; License , known as the LLGPL and distributed with OpenMCL as the
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| 8 | ;;; file "LICENSE". The LLGPL consists of a preamble and the LGPL,
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| 9 | ;;; which is distributed with OpenMCL as the file "LGPL". Where these
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| 10 | ;;; conflict, the preamble takes precedence.
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| 11 | ;;;
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| 12 | ;;; OpenMCL is referenced in the preamble as the "LIBRARY."
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| 13 | ;;;
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| 14 | ;;; The LLGPL is also available online at
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| 15 | ;;; http://opensource.franz.com/preamble.html
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| 16 |
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| 17 |
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| 18 | (eval-when (:compile-toplevel :load-toplevel :execute)
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| 19 | (require "PPC-LAP"))
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| 20 |
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| 21 |
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| 22 | (defppclapmacro clrrri (&rest args)
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| 23 | (target-arch-case
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| 24 | (:ppc32 `(clrrwi ,@args))
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| 25 | (:ppc64 `(clrrdi ,@args))))
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| 26 |
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| 27 | (defppclapmacro clrlri (&rest args)
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| 28 | (target-arch-case
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| 29 | (:ppc32 `(clrlwi ,@args))
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| 30 | (:ppc64 `(clrldi ,@args))))
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| 31 |
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| 32 | (defppclapmacro clrlri. (&rest args)
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| 33 | (target-arch-case
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| 34 | (:ppc32 `(clrlwi. ,@args))
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| 35 | (:ppc64 `(clrldi. ,@args))))
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| 36 |
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| 37 | (defppclapmacro ldr (&rest args)
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| 38 | (target-arch-case
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| 39 | (:ppc32 `(lwz ,@args))
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| 40 | (:ppc64 `(ld ,@args))))
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| 41 |
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| 42 | (defppclapmacro ldrx (&rest args)
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| 43 | (target-arch-case
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| 44 | (:ppc32 `(lwzx ,@args))
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| 45 | (:ppc64 `(ldx ,@args))))
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| 46 |
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| 47 | (defppclapmacro ldru (&rest args)
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| 48 | (target-arch-case
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| 49 | (:ppc32 `(lwzu ,@args))
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| 50 | (:ppc64 `(ldu ,@args))))
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| 51 |
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| 52 | (defppclapmacro str (&rest args)
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| 53 | (target-arch-case
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| 54 | (:ppc32 `(stw ,@args))
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| 55 | (:ppc64 `(std ,@args))))
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| 56 |
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| 57 | (defppclapmacro strx (&rest args)
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| 58 | (target-arch-case
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| 59 | (:ppc32 `(stwx ,@args))
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| 60 | (:ppc64 `(stdx ,@args))))
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| 61 |
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| 62 | (defppclapmacro stru (&rest args)
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| 63 | (target-arch-case
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| 64 | (:ppc32 `(stwu ,@args))
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| 65 | (:ppc64 `(stdu ,@args))))
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| 66 |
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| 67 | (defppclapmacro strux (&rest args)
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| 68 | (target-arch-case
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| 69 | (:ppc32 `(stwux ,@args))
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| 70 | (:ppc64 `(stdux ,@args))))
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| 71 |
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| 72 | (defppclapmacro lrarx (&rest args)
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| 73 | (target-arch-case
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| 74 | (:ppc32 `(lwarx ,@args))
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| 75 | (:ppc64 `(ldarx ,@args))))
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| 76 |
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| 77 | (defppclapmacro strcx. (&rest args)
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| 78 | (target-arch-case
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| 79 | (:ppc32 `(stwcx. ,@args))
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| 80 | (:ppc64 `(stdcx. ,@args))))
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| 81 |
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| 82 | (defppclapmacro cmpr (&rest args)
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| 83 | (target-arch-case
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| 84 | (:ppc32 `(cmpw ,@args))
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| 85 | (:ppc64 `(cmpd ,@args))))
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| 86 |
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| 87 | (defppclapmacro cmpri (&rest args)
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| 88 | (target-arch-case
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| 89 | (:ppc32 `(cmpwi ,@args))
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| 90 | (:ppc64 `(cmpdi ,@args))))
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| 91 |
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| 92 | (defppclapmacro cmplr (&rest args)
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| 93 | (target-arch-case
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| 94 | (:ppc32 `(cmplw ,@args))
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| 95 | (:ppc64 `(cmpld ,@args))))
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| 96 |
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| 97 | (defppclapmacro cmplri (&rest args)
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| 98 | (target-arch-case
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| 99 | (:ppc32 `(cmplwi ,@args))
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| 100 | (:ppc64 `(cmpldi ,@args))))
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| 101 |
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| 102 | (defppclapmacro trlge (&rest args)
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| 103 | (target-arch-case
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| 104 | (:ppc32 `(twlge ,@args))
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| 105 | (:ppc64 `(tdlge ,@args))))
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| 106 |
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| 107 | (defppclapmacro trlgei (&rest args)
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| 108 | (target-arch-case
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| 109 | (:ppc32 `(twlgei ,@args))
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| 110 | (:ppc64 `(tdlgei ,@args))))
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| 111 |
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| 112 | (defppclapmacro trllt (&rest args)
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| 113 | (target-arch-case
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| 114 | (:ppc32 `(twllt ,@args))
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| 115 | (:ppc64 `(tdllt ,@args))))
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| 116 |
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| 117 | (defppclapmacro trllti (&rest args)
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| 118 | (target-arch-case
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| 119 | (:ppc32 `(twllti ,@args))
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| 120 | (:ppc64 `(tdllti ,@args))))
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| 121 |
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| 122 | (defppclapmacro trlgti (&rest args)
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| 123 | (target-arch-case
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| 124 | (:ppc32 `(twlgti ,@args))
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| 125 | (:ppc64 `(tdlgti ,@args))))
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| 126 |
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| 127 | (defppclapmacro trlti (&rest args)
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| 128 | (target-arch-case
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| 129 | (:ppc32 `(twlti ,@args))
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| 130 | (:ppc64 `(tdlti ,@args))))
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| 131 |
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| 132 | (defppclapmacro trlle (&rest args)
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| 133 | (target-arch-case
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| 134 | (:ppc32 `(twlle ,@args))
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| 135 | (:ppc64 `(tdlle ,@args))))
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| 136 |
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| 137 | (defppclapmacro treqi (&rest args)
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| 138 | (target-arch-case
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| 139 | (:ppc32 `(tweqi ,@args))
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| 140 | (:ppc64 `(tdeqi ,@args))))
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| 141 |
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| 142 | (defppclapmacro trnei (&rest args)
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| 143 | (target-arch-case
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| 144 | (:ppc32 `(twnei ,@args))
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| 145 | (:ppc64 `(tdnei ,@args))))
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| 146 |
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| 147 | (defppclapmacro trgti (&rest args)
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| 148 | (target-arch-case
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| 149 | (:ppc32 `(twgti ,@args))
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| 150 | (:ppc64 `(tdgti ,@args))))
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| 151 |
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| 152 |
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| 153 | (defppclapmacro srari (&rest args)
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| 154 | (target-arch-case
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| 155 | (:ppc32 `(srawi ,@args))
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| 156 | (:ppc64 `(sradi ,@args))))
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| 157 |
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| 158 | (defppclapmacro srar (&rest args)
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| 159 | (target-arch-case
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| 160 | (:ppc32 `(sraw ,@args))
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| 161 | (:ppc64 `(srad ,@args))))
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| 162 |
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| 163 | (defppclapmacro slr (&rest args)
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| 164 | (target-arch-case
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| 165 | (:ppc32 `(slw ,@args))
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| 166 | (:ppc64 `(sld ,@args))))
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| 167 |
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| 168 | (defppclapmacro srri (&rest args)
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| 169 | (target-arch-case
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| 170 | (:ppc32 `(srwi ,@args))
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| 171 | (:ppc64 `(srdi ,@args))))
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| 172 |
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| 173 | (defppclapmacro slri (&rest args)
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| 174 | (target-arch-case
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| 175 | (:ppc32 `(slwi ,@args))
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| 176 | (:ppc64 `(sldi ,@args))))
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| 177 |
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| 178 | (defppclapmacro srr (&rest args)
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| 179 | (target-arch-case
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| 180 | (:ppc32 `(srw ,@args))
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| 181 | (:ppc64 `(srd ,@args))))
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| 182 |
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| 183 | (defppclapmacro bkpt ()
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| 184 | `(tweq rzero rzero))
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| 185 |
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| 186 | (defppclapmacro dbg (&optional save-lr?)
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| 187 | (if save-lr?
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| 188 | `(progn
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| 189 | (mflr loc-pc)
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| 190 | (str imm0 -40 sp) ; better than clobbering imm0
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| 191 | (bla .SPbreakpoint)
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| 192 | (ldr imm0 -40 sp)
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| 193 | (mtlr loc-pc))
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| 194 | `(bla .SPbreakpoint)))
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| 195 |
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| 196 | (defppclapmacro lwi (dest n)
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| 197 | (setq n (logand n #xffffffff))
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| 198 | (let* ((mask #xffff8000)
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| 199 | (masked (logand n mask))
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| 200 | (high (ash n -16))
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| 201 | (low (logand #xffff n)))
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| 202 | (if (or (= 0 masked) (= mask masked))
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| 203 | `(li ,dest ,low)
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| 204 | (if (= low 0)
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| 205 | `(lis ,dest ,high)
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| 206 | `(progn
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| 207 | (lis ,dest ,high)
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| 208 | (ori ,dest ,dest ,low))))))
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| 209 |
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| 210 | (defppclapmacro set-nargs (n)
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| 211 | (check-type n (unsigned-byte 13))
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| 212 | `(li nargs ',n))
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| 213 |
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| 214 | (defppclapmacro check-nargs (min &optional (max min))
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| 215 | (if (eq max min)
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| 216 | `(trnei nargs ',min)
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| 217 | (if (null max)
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| 218 | (unless (= min 0)
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| 219 | `(trllti nargs ',min))
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| 220 | (if (= min 0)
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| 221 | `(trlgti nargs ',max)
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| 222 | `(progn
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| 223 | (trllti nargs ',min)
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| 224 | (trlgti nargs ',max))))))
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| 225 |
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| 226 | ;; Event-polling involves checking to see if the value of the current
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| 227 | ;; thread's interrupt-level is > 0. For now, use nargs; this may
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| 228 | ;; change to "any register BUT nargs". (Note that most number-of-args
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| 229 | ;; traps use unsigned comparisons.)
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| 230 | (defppclapmacro event-poll ()
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| 231 | (target-arch-case
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| 232 | (:ppc32
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| 233 | '(progn
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| 234 | (lwz nargs ppc32::tcr.tlb-pointer ppc32::rcontext)
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| 235 | (lwz nargs ppc32::interrupt-level-binding-index nargs)
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| 236 | (twgti nargs 0)))
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| 237 | (:ppc64
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| 238 | '(progn
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| 239 | (ld nargs ppc64::tcr.tlb-pointer ppc64::rcontext)
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| 240 | (ld nargs ppc64::interrupt-level-binding-index nargs)
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| 241 | (tdgti nargs 0)))))
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| 242 |
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| 243 |
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| 244 | ;;; There's no "else"; learn to say "(progn ...)".
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| 245 | ;;; Note also that the condition is a CR bit specification (or a "negated" one).
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| 246 | ;;; Whatever affected that bit (hopefully) happened earlier in the pipeline.
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| 247 | (defppclapmacro if (test then &optional (else nil else-p))
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| 248 | (multiple-value-bind (bitform negated) (ppc-lap-parse-test test)
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| 249 | (let* ((false-label (gensym)))
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| 250 | (if (not else-p)
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| 251 | `(progn
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| 252 | (,(if negated 'bt 'bf) ,bitform ,false-label)
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| 253 | ,then
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| 254 | ,false-label)
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| 255 | (let* ((cont-label (gensym)))
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| 256 | `(progn
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| 257 | (,(if negated 'bt 'bf) ,bitform ,false-label)
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| 258 | ,then
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| 259 | (b ,cont-label)
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| 260 | ,false-label
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| 261 | ,else
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| 262 | ,cont-label))))))
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| 263 |
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| 264 | (defppclapmacro save-pc ()
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| 265 | `(mflr loc-pc))
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| 266 |
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| 267 | ;;; This needs to be done if we aren't a leaf function (e.g., if we
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| 268 | ;;; clobber our return address or need to reference any constants. Note
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| 269 | ;;; that it's not atomic wrt a preemptive scheduler, but we need to
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| 270 | ;;; pretend that it will be.) The VSP to be saved is the value of the
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| 271 | ;;; VSP before any of this function's arguments were vpushed by its
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| 272 | ;;; caller; that's not the same as the VSP register if any non-register
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| 273 | ;;; arguments were received, but is usually easy to compute.
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| 274 |
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| 275 | (defppclapmacro save-lisp-context (&optional (vsp 'vsp) (save-pc t))
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| 276 | (target-arch-case
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| 277 | (:ppc32
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| 278 | `(progn
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| 279 | ,@(if save-pc
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| 280 | '((save-pc)))
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| 281 | (stwu sp (- ppc32::lisp-frame.size) sp)
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| 282 | (stw fn ppc32::lisp-frame.savefn sp)
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| 283 | (stw loc-pc ppc32::lisp-frame.savelr sp)
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| 284 | (stw ,vsp ppc32::lisp-frame.savevsp sp)
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| 285 | (mr fn nfn)))
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| 286 | (:ppc64
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| 287 | `(progn
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| 288 | ,@(if save-pc
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| 289 | '((save-pc)))
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| 290 | (stdu sp (- ppc64::lisp-frame.size) sp)
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| 291 | (std fn ppc64::lisp-frame.savefn sp)
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| 292 | (std loc-pc ppc64::lisp-frame.savelr sp)
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| 293 | (std ,vsp ppc64::lisp-frame.savevsp sp)
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| 294 | (mr fn nfn)))))
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| 295 |
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| 296 | ;;; There are a few cases to deal with when restoring: whether or not
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| 297 | ;;; to restore the vsp, whether we need to saved LR back in the LR or
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| 298 | ;;; whether it only needs to get as far as loc-pc, etc. This fully
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| 299 | ;;; restores everything (letting the caller specify some register
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| 300 | ;;; other than the VSP, if that's useful.) Note that, since FN gets
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| 301 | ;;; restored, it's no longer possible to use it to address the current
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| 302 | ;;; function's constants.
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| 303 | (defppclapmacro restore-full-lisp-context (&optional (vsp 'vsp))
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| 304 | (target-arch-case
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| 305 | (:ppc32
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| 306 | `(progn
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| 307 | (lwz loc-pc ppc32::lisp-frame.savelr sp)
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| 308 | (lwz ,vsp ppc32::lisp-frame.savevsp sp)
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| 309 | (mtlr loc-pc)
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| 310 | (lwz fn ppc32::lisp-frame.savefn sp)
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| 311 | (la sp ppc32::lisp-frame.size sp)))
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| 312 | (:ppc64
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| 313 | `(progn
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| 314 | (ld loc-pc ppc64::lisp-frame.savelr sp)
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| 315 | (ld ,vsp ppc64::lisp-frame.savevsp sp)
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| 316 | (mtlr loc-pc)
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| 317 | (ld fn ppc64::lisp-frame.savefn sp)
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| 318 | (la sp ppc64::lisp-frame.size sp)))))
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| 319 |
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| 320 | (defppclapmacro restore-pc ()
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| 321 | `(mtlr loc-pc))
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| 322 |
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| 323 | (defppclapmacro push (src stack)
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| 324 | `(stru ,src ,(- (arch::target-lisp-node-size (backend-target-arch *target-backend*))) ,stack))
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| 325 |
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| 326 | (defppclapmacro vpush (src)
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| 327 | `(push ,src vsp))
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| 328 |
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| 329 | ;;; You typically don't want to do this to pop a single register (it's better to
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| 330 | ;;; do a sequence of loads, and then adjust the stack pointer.)
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| 331 |
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| 332 | (defppclapmacro pop (dest stack)
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| 333 | `(progn
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| 334 | (ldr ,dest 0 ,stack)
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| 335 | (la ,stack ,(arch::target-lisp-node-size (backend-target-arch *target-backend*)) ,stack)))
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| 336 |
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| 337 | (defppclapmacro vpop (dest)
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| 338 | `(pop ,dest vsp))
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| 339 |
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| 340 | (defppclapmacro %cdr (dest node)
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| 341 | (target-arch-case
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| 342 | (:ppc32 `(lwz ,dest ppc32::cons.cdr ,node))
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| 343 | (:ppc64 `(ld ,dest ppc64::cons.cdr ,node))))
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| 344 |
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| 345 | (defppclapmacro %car (dest node)
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| 346 | (target-arch-case
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| 347 | (:ppc32 `(lwz ,dest ppc32::cons.car ,node))
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| 348 | (:ppc64 `(ld ,dest ppc64::cons.car ,node))))
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| 349 |
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| 350 | (defppclapmacro extract-lisptag (dest node)
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| 351 | (let* ((tb *target-backend*))
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| 352 | `(clrlri ,dest ,node (- ,(arch::target-nbits-in-word (backend-target-arch tb))
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| 353 | ,(arch::target-nlisptagbits (backend-target-arch tb))))))
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| 354 |
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| 355 | (defppclapmacro extract-fulltag (dest node)
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| 356 | (let* ((tb *target-backend*))
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| 357 | `(clrlri ,dest ,node (- ,(arch::target-nbits-in-word (backend-target-arch tb))
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| 358 | ,(arch::target-ntagbits (backend-target-arch tb))))))
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| 359 |
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| 360 | (defppclapmacro extract-lowtag (dest node)
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| 361 | (target-arch-case
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| 362 | (:ppc32
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| 363 | (error "EXTRACT-LOWTAG lapmacro makes no sense on PPC32."))
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| 364 | (:ppc64
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| 365 | `(clrldi ,dest ,node (- 64 ppc64::nlowtagbits)))))
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| 366 |
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| 367 |
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| 368 | (defppclapmacro extract-subtag (dest node)
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| 369 | (target-arch-case
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| 370 | (:ppc32
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| 371 | `(lbz ,dest ppc32::misc-subtag-offset ,node))
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| 372 | (:ppc64
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| 373 | `(lbz ,dest ppc64::misc-subtag-offset ,node))))
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| 374 |
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| 375 | (defppclapmacro extract-typecode (dest node &optional (crf :cr0))
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| 376 | (target-arch-case
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| 377 | (:ppc32
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| 378 | `(progn
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| 379 | (extract-lisptag ,dest ,node)
|
|---|
| 380 | (cmpwi ,crf ,dest ppc32::tag-misc)
|
|---|
| 381 | (if (,crf :eq)
|
|---|
| 382 | (extract-subtag ,dest ,node))))
|
|---|
| 383 | (:ppc64
|
|---|
| 384 | `(progn
|
|---|
| 385 | (extract-fulltag ,dest ,node)
|
|---|
| 386 | (cmpdi ,crf ,dest ppc64::fulltag-misc)
|
|---|
| 387 | (extract-lisptag ,dest ,dest)
|
|---|
| 388 | (if (,crf :eq)
|
|---|
| 389 | (extract-subtag ,dest ,node))))))
|
|---|
| 390 |
|
|---|
| 391 | (defppclapmacro trap-unless-lisptag= (node tag &optional (immreg ppc::imm0))
|
|---|
| 392 | `(progn
|
|---|
| 393 | (extract-lisptag ,immreg ,node)
|
|---|
| 394 | (trnei ,immreg ,tag)))
|
|---|
| 395 |
|
|---|
| 396 | (defppclapmacro trap-unless-fulltag= (node tag &optional (immreg ppc::imm0))
|
|---|
| 397 | `(progn
|
|---|
| 398 | (extract-fulltag ,immreg ,node)
|
|---|
| 399 | (trnei ,immreg ,tag)))
|
|---|
| 400 |
|
|---|
| 401 |
|
|---|
| 402 | (defppclapmacro trap-unless-typecode= (node tag &optional (immreg ppc::imm0) (crf :cr0))
|
|---|
| 403 | `(progn
|
|---|
| 404 | (extract-typecode ,immreg ,node ,crf)
|
|---|
| 405 | (trnei ,immreg ,tag)))
|
|---|
| 406 |
|
|---|
| 407 |
|
|---|
| 408 | (defppclapmacro load-constant (dest constant)
|
|---|
| 409 | `(ldr ,dest ',constant fn))
|
|---|
| 410 |
|
|---|
| 411 | ;;; This is about as hard on the pipeline as anything I can think of.
|
|---|
| 412 | (defppclapmacro call-symbol (function-name)
|
|---|
| 413 | (target-arch-case
|
|---|
| 414 | (:ppc32
|
|---|
| 415 | `(progn
|
|---|
| 416 | (load-constant fname ,function-name)
|
|---|
| 417 | (lwz nfn ppc32::symbol.fcell fname)
|
|---|
| 418 | (lwz loc-pc ppc32::misc-data-offset nfn)
|
|---|
| 419 | (mtctr loc-pc)
|
|---|
| 420 | (bctrl)))
|
|---|
| 421 | (:ppc64
|
|---|
| 422 | `(progn
|
|---|
| 423 | (load-constant fname ,function-name)
|
|---|
| 424 | (ld nfn ppc64::symbol.fcell fname)
|
|---|
| 425 | (ld loc-pc ppc64::misc-data-offset nfn)
|
|---|
| 426 | (mtctr loc-pc)
|
|---|
| 427 | (bctrl)))))
|
|---|
| 428 |
|
|---|
| 429 | (defppclapmacro sp-call-symbol (function-name)
|
|---|
| 430 | `(progn
|
|---|
| 431 | (load-constant fname ,function-name)
|
|---|
| 432 | (bla .SPjmpsym)))
|
|---|
| 433 |
|
|---|
| 434 | (defppclapmacro getvheader (dest src)
|
|---|
| 435 | (target-arch-case
|
|---|
| 436 | (:ppc32
|
|---|
| 437 | `(lwz ,dest ppc32::misc-header-offset ,src))
|
|---|
| 438 | (:ppc64
|
|---|
| 439 | `(ld ,dest ppc64::misc-header-offset ,src))))
|
|---|
| 440 |
|
|---|
| 441 | ;;; "Size" is unboxed element-count.
|
|---|
| 442 | (defppclapmacro header-size (dest vheader)
|
|---|
| 443 | (target-arch-case
|
|---|
| 444 | (:ppc32
|
|---|
| 445 | `(srwi ,dest ,vheader ppc32::num-subtag-bits))
|
|---|
| 446 | (:ppc64
|
|---|
| 447 | `(srdi ,dest ,vheader ppc64::num-subtag-bits))))
|
|---|
| 448 |
|
|---|
| 449 |
|
|---|
| 450 | ;;; "Length" is fixnum element-count.
|
|---|
| 451 | (defppclapmacro header-length (dest vheader)
|
|---|
| 452 | (target-arch-case
|
|---|
| 453 | (:ppc32
|
|---|
| 454 | `(rlwinm ,dest
|
|---|
| 455 | ,vheader
|
|---|
| 456 | (- ppc32::nbits-in-word (- ppc32::num-subtag-bits ppc32::nfixnumtagbits))
|
|---|
| 457 | (- ppc32::num-subtag-bits ppc32::nfixnumtagbits)
|
|---|
| 458 | (- ppc32::least-significant-bit ppc32::nfixnumtagbits)))
|
|---|
| 459 | (:ppc64
|
|---|
| 460 | `(progn
|
|---|
| 461 | (rldicr ,dest
|
|---|
| 462 | ,vheader
|
|---|
| 463 | (- 64 (- ppc64::num-subtag-bits ppc64::fixnumshift))
|
|---|
| 464 | (- 63 ppc64::fixnumshift))
|
|---|
| 465 | (clrldi ,dest ,dest (- ppc64::num-subtag-bits ppc64::fixnumshift))))))
|
|---|
| 466 |
|
|---|
| 467 |
|
|---|
| 468 | (defppclapmacro header-subtag[fixnum] (dest vheader)
|
|---|
| 469 | (target-arch-case
|
|---|
| 470 | (:ppc32
|
|---|
| 471 | `(rlwinm ,dest
|
|---|
| 472 | ,vheader
|
|---|
| 473 | ppc32::fixnumshift
|
|---|
| 474 | (- ppc32::nbits-in-word (+ ppc32::num-subtag-bits ppc32::nfixnumtagbits))
|
|---|
| 475 | (- ppc32::least-significant-bit ppc32::nfixnumtagbits)))
|
|---|
| 476 | (:ppc64
|
|---|
| 477 | `(clrlsldi ,dest
|
|---|
| 478 | ,vheader (- ppc64::nbits-in-word ppc64::num-subtag-bits)
|
|---|
| 479 | ppc64::fixnumshift))))
|
|---|
| 480 |
|
|---|
| 481 |
|
|---|
| 482 | (defppclapmacro vector-size (dest v vheader)
|
|---|
| 483 | `(progn
|
|---|
| 484 | (getvheader ,vheader ,v)
|
|---|
| 485 | (header-size ,dest ,vheader)))
|
|---|
| 486 |
|
|---|
| 487 | (defppclapmacro vector-length (dest v vheader)
|
|---|
| 488 | `(progn
|
|---|
| 489 | (getvheader ,vheader ,v)
|
|---|
| 490 | (header-length ,dest ,vheader)))
|
|---|
| 491 |
|
|---|
| 492 |
|
|---|
| 493 | ;;; Reference a 32-bit miscobj entry at a variable index.
|
|---|
| 494 | ;;; Make the caller explicitly designate a scratch register
|
|---|
| 495 | ;;; to use for the scaled index.
|
|---|
| 496 |
|
|---|
| 497 | (defppclapmacro vref32 (dest miscobj index scaled-idx)
|
|---|
| 498 | `(progn
|
|---|
| 499 | (la ,scaled-idx ppc32::misc-data-offset ,index)
|
|---|
| 500 | (lwzx ,dest ,miscobj ,scaled-idx)))
|
|---|
| 501 |
|
|---|
| 502 | ;; The simple (no-memoization) case.
|
|---|
| 503 | (defppclapmacro vset32 (src miscobj index scaled-idx)
|
|---|
| 504 | `(progn
|
|---|
| 505 | (la ,scaled-idx ppc32::misc-data-offset ,index)
|
|---|
| 506 | (stwx ,src ,miscobj ,scaled-idx)))
|
|---|
| 507 |
|
|---|
| 508 | (defppclapmacro extract-lowbyte (dest src)
|
|---|
| 509 | (target-arch-case
|
|---|
| 510 | (:ppc32 `(clrlwi ,dest ,src (- 32 8)))
|
|---|
| 511 | (:ppc64 `(clrldi ,dest ,src (- 64 8)))))
|
|---|
| 512 |
|
|---|
| 513 | (defppclapmacro unbox-fixnum (dest src)
|
|---|
| 514 | (target-arch-case
|
|---|
| 515 | (:ppc32
|
|---|
| 516 | `(srawi ,dest ,src ppc32::fixnumshift))
|
|---|
| 517 | (:ppc64
|
|---|
| 518 | `(sradi ,dest ,src ppc64::fixnumshift))))
|
|---|
| 519 |
|
|---|
| 520 | (defppclapmacro box-fixnum (dest src)
|
|---|
| 521 | (target-arch-case
|
|---|
| 522 | (:ppc32
|
|---|
| 523 | `(slwi ,dest ,src ppc32::fixnumshift))
|
|---|
| 524 | (:ppc64
|
|---|
| 525 | `(sldi ,dest ,src ppc64::fixnumshift))))
|
|---|
| 526 |
|
|---|
| 527 |
|
|---|
| 528 |
|
|---|
| 529 | ;;; If crf is specified, type checks src
|
|---|
| 530 | (defppclapmacro unbox-base-char (dest src &optional crf)
|
|---|
| 531 | (if (null crf)
|
|---|
| 532 | (target-arch-case
|
|---|
| 533 | (:ppc32 `(srwi ,dest ,src ppc32::charcode-shift))
|
|---|
| 534 | (:ppc64 `(srdi ,dest ,src ppc64::charcode-shift)))
|
|---|
| 535 | (let ((label (gensym)))
|
|---|
| 536 | (target-arch-case
|
|---|
| 537 | (:ppc32 `(progn
|
|---|
| 538 | (clrlwi ,dest ,src (- ppc32::nbits-in-word ppc32::charcode-shift))
|
|---|
| 539 | (cmpwi ,crf ,dest ppc32::subtag-character)
|
|---|
| 540 | (srwi ,dest ,src ppc32::charcode-shift)
|
|---|
| 541 | (beq+ ,crf ,label)
|
|---|
| 542 | (uuo_interr arch::error-object-not-base-char ,src)
|
|---|
| 543 | ,label))
|
|---|
| 544 | (:ppc64
|
|---|
| 545 | `(progn
|
|---|
| 546 | (clrldi ,dest ,src (- ppc64::nbits-in-word ppc64::num-subtag-bits))
|
|---|
| 547 | (cmpdi ,crf ,dest ppc64::subtag-character)
|
|---|
| 548 | (srdi ,dest ,src ppc64::charcode-shift)
|
|---|
| 549 | (beq+ ,crf ,label)
|
|---|
| 550 | (uuo_interr arch::error-object-not-base-char ,src)
|
|---|
| 551 | ,label))))))
|
|---|
| 552 |
|
|---|
| 553 |
|
|---|
| 554 |
|
|---|
| 555 |
|
|---|
| 556 | (defppclapmacro ref-global (reg sym)
|
|---|
| 557 | (target-arch-case
|
|---|
| 558 | (:ppc32
|
|---|
| 559 | (let* ((offset (ppc32::%kernel-global sym)))
|
|---|
| 560 | `(lwz ,reg (+ ,offset ppc32::nil-value) 0)))
|
|---|
| 561 | (:ppc64
|
|---|
| 562 | (let* ((offset (ppc64::%kernel-global sym)))
|
|---|
| 563 | `(ld ,reg (+ ,offset ppc64::nil-value) 0)))))
|
|---|
| 564 |
|
|---|
| 565 | (defppclapmacro set-global (reg sym)
|
|---|
| 566 | (target-arch-case
|
|---|
| 567 | (:ppc32
|
|---|
| 568 | (let* ((offset (ppc32::%kernel-global sym)))
|
|---|
| 569 | `(stw ,reg (+ ,offset ppc32::nil-value) 0)))
|
|---|
| 570 | (:ppc64
|
|---|
| 571 | (let* ((offset (ppc64::%kernel-global sym)))
|
|---|
| 572 | `(std ,reg (+ ,offset ppc64::nil-value) 0)))))
|
|---|
| 573 |
|
|---|
| 574 | ;;; Set "dest" to those bits in "src" that are other than those that
|
|---|
| 575 | ;;; would be set if "src" is a fixnum and of type (unsigned-byte
|
|---|
| 576 | ;;; "width"). If no bits are set in "dest", then "src" is indeed of
|
|---|
| 577 | ;;; type (unsigned-byte "width"). Set (:CR0 :EQ) according to the
|
|---|
| 578 | ;;; result.
|
|---|
| 579 | (defppclapmacro extract-unsigned-byte-bits. (dest src width)
|
|---|
| 580 | (target-arch-case
|
|---|
| 581 | (:ppc32
|
|---|
| 582 | `(rlwinm. ,dest ,src 0 (- 32 ppc32::fixnumshift) (- 31 (+ ,width ppc32::fixnumshift))))
|
|---|
| 583 | (:ppc64
|
|---|
| 584 | `(rldicr. ,dest ,src (- 64 ppc64::fixnumshift) (- 63 ,width)))))
|
|---|
| 585 |
|
|---|
| 586 |
|
|---|
| 587 |
|
|---|
| 588 | ;;; You generally don't want to have to say "mfcr": it crosses functional
|
|---|
| 589 | ;;; units and forces synchronization (all preceding insns must complete,
|
|---|
| 590 | ;;; no subsequent insns may start.)
|
|---|
| 591 | ;;; There are often algebraic ways of computing ppc32::t-offset:
|
|---|
| 592 |
|
|---|
| 593 | ;;; Src has all but the least significant bit clear. Map low bit to T/NIL.
|
|---|
| 594 | (defppclapmacro bit0->boolean (dest src temp)
|
|---|
| 595 | (target-arch-case
|
|---|
| 596 | (:ppc32
|
|---|
| 597 | `(progn
|
|---|
| 598 | (rlwimi ,temp ,src 4 27 27)
|
|---|
| 599 | (addi ,dest ,temp ppc32::nil-value)))
|
|---|
| 600 | (:ppc64
|
|---|
| 601 | `(progn
|
|---|
| 602 | (mulli ,temp ,src ppc64::t-offset) ; temp = ppc64::t-offset, or 0
|
|---|
| 603 | (addi ,dest ,temp ppc64::nil-value))))) ; dest = (src == 1), lisp-wise
|
|---|
| 604 |
|
|---|
| 605 | (defppclapmacro eq0->boolean (dest src temp)
|
|---|
| 606 | (target-arch-case
|
|---|
| 607 | (:ppc32
|
|---|
| 608 | `(progn
|
|---|
| 609 | (cntlzw ,temp ,src) ; 32 leading zeros if (src == 0)
|
|---|
| 610 | (srwi ,temp ,temp 5) ; temp = (src == 0), C-wise
|
|---|
| 611 | (bit0->boolean ,dest ,temp ,temp)))
|
|---|
| 612 | (:ppc64
|
|---|
| 613 | `(progn
|
|---|
| 614 | (cntlzd ,temp ,src) ; 64 leading zeros if (src == 0)
|
|---|
| 615 | (srdi ,temp ,temp 6) ; temp = (src == 0), C-wise
|
|---|
| 616 | (bit0->boolean ,dest ,temp ,temp)))))
|
|---|
| 617 |
|
|---|
| 618 | (defppclapmacro eq->boolean (dest rx ry temp)
|
|---|
| 619 | `(progn
|
|---|
| 620 | (sub ,temp ,rx ,ry)
|
|---|
| 621 | (eq0->boolean ,dest ,temp ,temp)))
|
|---|
| 622 |
|
|---|
| 623 |
|
|---|
| 624 | (defppclapmacro repeat (n inst)
|
|---|
| 625 | (let* ((insts ()))
|
|---|
| 626 | (dotimes (i n `(progn ,@(nreverse insts)))
|
|---|
| 627 | (push inst insts))))
|
|---|
| 628 |
|
|---|
| 629 | (defppclapmacro get-single-float (dest node)
|
|---|
| 630 | (target-arch-case
|
|---|
| 631 | (:ppc32
|
|---|
| 632 | `(lfs ,dest ppc32::single-float.value ,node))
|
|---|
| 633 | (:ppc64
|
|---|
| 634 | `(progn
|
|---|
| 635 | (std ,node ppc64::tcr.single-float-convert ppc64::rcontext)
|
|---|
| 636 | (lfs ,dest ppc64::tcr.single-float-convert ppc64::rcontext)))))
|
|---|
| 637 |
|
|---|
| 638 | (defppclapmacro get-double-float (dest node)
|
|---|
| 639 | (target-arch-case
|
|---|
| 640 | (:ppc32
|
|---|
| 641 | `(lfd ,dest ppc32::double-float.value ,node))
|
|---|
| 642 | (:ppc64
|
|---|
| 643 | `(lfd ,dest ppc64::double-float.value ,node))))
|
|---|
| 644 |
|
|---|
| 645 |
|
|---|
| 646 | (defppclapmacro put-single-float (src node)
|
|---|
| 647 | (target-arch-case
|
|---|
| 648 | (:ppc32
|
|---|
| 649 | `(stfs ,src ppc32::single-float.value ,node))
|
|---|
| 650 | (:ppc64
|
|---|
| 651 | `(progn
|
|---|
| 652 | (stfs ,src ppc64::tcr.single-float-convert ppc64::rcontext)
|
|---|
| 653 | (ld ,node ppc64::tcr.single-float-convert ppc64::rcontext)))))
|
|---|
| 654 |
|
|---|
| 655 | (defppclapmacro put-double-float (src node)
|
|---|
| 656 | (target-arch-case
|
|---|
| 657 | (:ppc32
|
|---|
| 658 | `(stfd ,src ppc32::double-float.value ,node))
|
|---|
| 659 | (:ppc64
|
|---|
| 660 | `(stfd ,src ppc64::double-float.value ,node))))
|
|---|
| 661 |
|
|---|
| 662 | (defppclapmacro clear-fpu-exceptions ()
|
|---|
| 663 | `(mtfsf #xfc #.ppc::fp-zero))
|
|---|
| 664 |
|
|---|
| 665 |
|
|---|
| 666 |
|
|---|
| 667 | ;;; from ppc-bignum.lisp
|
|---|
| 668 | (defppclapmacro digit-h (dest src)
|
|---|
| 669 | (target-arch-case
|
|---|
| 670 | (:ppc32
|
|---|
| 671 | `(rlwinm ,dest ,src (+ 16 ppc32::fixnumshift) (- 16 ppc32::fixnumshift) (- 31 ppc32::fixnumshift)))
|
|---|
| 672 | (:ppc64
|
|---|
| 673 | (error "DIGIT-H on PPC64 ?"))))
|
|---|
| 674 |
|
|---|
| 675 | ;;; from ppc-bignum.lisp
|
|---|
| 676 | (defppclapmacro digit-l (dest src)
|
|---|
| 677 | (target-arch-case
|
|---|
| 678 | (:ppc32
|
|---|
| 679 | `(clrlslwi ,dest ,src 16 ppc32::fixnumshift))
|
|---|
| 680 | (:ppc64
|
|---|
| 681 | (error "DIGIT-L on PPC64 ?"))))
|
|---|
| 682 |
|
|---|
| 683 | ;;; from ppc-bignum.lisp
|
|---|
| 684 | (defppclapmacro compose-digit (dest high low)
|
|---|
| 685 | (target-arch-case
|
|---|
| 686 | (:ppc32
|
|---|
| 687 | `(progn
|
|---|
| 688 | (rlwinm ,dest ,low (- ppc32::nbits-in-word ppc32::fixnumshift) 16 31)
|
|---|
| 689 | (rlwimi ,dest ,high (- 16 ppc32::fixnumshift) 0 15)))
|
|---|
| 690 | (:ppc64
|
|---|
| 691 | (error "COMPOSE-DIGIT on PPC64 ?"))))
|
|---|
| 692 |
|
|---|
| 693 | (defppclapmacro macptr-ptr (dest macptr)
|
|---|
| 694 | (target-arch-case
|
|---|
| 695 | (:ppc32
|
|---|
| 696 | `(lwz ,dest ppc32::macptr.address ,macptr))
|
|---|
| 697 | (:ppc64
|
|---|
| 698 | `(ld ,dest ppc64::macptr.address ,macptr))))
|
|---|
| 699 |
|
|---|
| 700 | (defppclapmacro svref (dest index vector)
|
|---|
| 701 | (target-arch-case
|
|---|
| 702 | (:ppc32
|
|---|
| 703 | `(lwz ,dest (+ (* 4 ,index) ppc32::misc-data-offset) ,vector))
|
|---|
| 704 | (:ppc64
|
|---|
| 705 | `(ld ,dest (+ (* 8 ,index) ppc64::misc-data-offset) ,vector))))
|
|---|
| 706 |
|
|---|
| 707 | ;;; This evals its args in the wrong order.
|
|---|
| 708 | ;;; Can't imagine any code will care.
|
|---|
| 709 | (defppclapmacro svset (new-value index vector)
|
|---|
| 710 | (target-arch-case
|
|---|
| 711 | (:ppc32
|
|---|
| 712 | `(stw ,new-value (+ (* 4 ,index) ppc32::misc-data-offset) ,vector))
|
|---|
| 713 | (:ppc64
|
|---|
| 714 | `(std ,new-value (+ (* 8 ,index) ppc64::misc-data-offset) ,vector))))
|
|---|
| 715 |
|
|---|
| 716 | (defppclapmacro vpush-argregs ()
|
|---|
| 717 | (let* ((none (gensym))
|
|---|
| 718 | (two (gensym))
|
|---|
| 719 | (one (gensym)))
|
|---|
| 720 | `(progn
|
|---|
| 721 | (cmpri cr1 nargs '2)
|
|---|
| 722 | (cmpri cr0 nargs 0)
|
|---|
| 723 | (beq cr1 ,two)
|
|---|
| 724 | (beq cr0 ,none)
|
|---|
| 725 | (blt cr1 ,one)
|
|---|
| 726 | (vpush arg_x)
|
|---|
| 727 | ,two
|
|---|
| 728 | (vpush arg_y)
|
|---|
| 729 | ,one
|
|---|
| 730 | (vpush arg_z)
|
|---|
| 731 | ,none)))
|
|---|
| 732 |
|
|---|
| 733 |
|
|---|
| 734 | |
|---|
| 735 |
|
|---|
| 736 | ;;; Saving and restoring AltiVec registers.
|
|---|
| 737 |
|
|---|
| 738 | ;;; Note that under the EABI (to which PPCLinux conforms), the OS
|
|---|
| 739 | ;;; doesn't attach any special significance to the value of the VRSAVE
|
|---|
| 740 | ;;; register (spr 256). Under some other ABIs, VRSAVE is a bitmask
|
|---|
| 741 | ;;; which indicates which vector registers are live at context switch
|
|---|
| 742 | ;;; time. These macros contain code to maintain VRSAVE when the
|
|---|
| 743 | ;;; variable *ALTIVEC-LAPMACROS-MAINTAIN-VRSAVE-P* is true at
|
|---|
| 744 | ;;; macroexpand time; that variable is initialized to true if and only
|
|---|
| 745 | ;;; if :EABI-TARGET is not on *FEATURES*. Making this behavior
|
|---|
| 746 | ;;; optional is supposed to help make code which uses these macros
|
|---|
| 747 | ;;; easier to port to other platforms.
|
|---|
| 748 |
|
|---|
| 749 | ;;; From what I can tell, a function that takes incoming arguments in
|
|---|
| 750 | ;;; vector registers (vr2 ... vr13) (and doesn't use any other vector
|
|---|
| 751 | ;;; registers) doesn't need to assert that it uses any vector
|
|---|
| 752 | ;;; registers (even on platforms that maintain VRSAVE.) A function
|
|---|
| 753 | ;;; that uses vector registers that were not incoming arguments has to
|
|---|
| 754 | ;;; assert that it uses those registers on platforms that maintain
|
|---|
| 755 | ;;; VRSAVE. On all platforms, a function that uses any non-volatile
|
|---|
| 756 | ;;; vector registers (vr20 ... vr31) has to assert that it uses these
|
|---|
| 757 | ;;; registers and save and restore the caller's value of these registers
|
|---|
| 758 | ;;; around that usage.
|
|---|
| 759 |
|
|---|
| 760 | (defparameter *altivec-lapmacros-maintain-vrsave-p*
|
|---|
| 761 | #-eabi-target t
|
|---|
| 762 | #+eabi-target nil
|
|---|
| 763 | "Control the expansion of certain lap macros. Initialized to NIL on
|
|---|
| 764 | LinuxPPC; initialized to T on platforms (such as MacOS X/Darwin) that
|
|---|
| 765 | require that the VRSAVE SPR contain a bitmask of active vector registers
|
|---|
| 766 | at all times.")
|
|---|
| 767 |
|
|---|
| 768 | (defun %vr-register-mask (reglist)
|
|---|
| 769 | (let* ((mask 0))
|
|---|
| 770 | (dolist (reg reglist mask)
|
|---|
| 771 | (let* ((regval (ppc-vector-register-name-or-expression reg)))
|
|---|
| 772 | (unless (typep regval '(mod 32))
|
|---|
| 773 | (error "Bad AltiVec register - ~s" reg))
|
|---|
| 774 | (setq mask (logior mask (ash #x80000000 (- regval))))))))
|
|---|
| 775 |
|
|---|
| 776 |
|
|---|
| 777 |
|
|---|
| 778 | ;;; Build a frame on the temp stack large enough to hold N 128-bit vector
|
|---|
| 779 | ;;; registers and the saved value of the VRSAVE spr. That frame will look
|
|---|
| 780 | ;;; like:
|
|---|
| 781 | ;;; #x??????I0 backpointer to previous tstack frame
|
|---|
| 782 | ;;; #x??????I4 non-zero marker: frame doesn't contain tagged lisp data
|
|---|
| 783 | ;;; #x??????I8 saved VRSAVE
|
|---|
| 784 | ;;; #x??????IC pad word for alignment
|
|---|
| 785 | ;;; #x??????J0 first saved vector register
|
|---|
| 786 | ;;; #x??????K0 second saved vector register
|
|---|
| 787 | ;;; ...
|
|---|
| 788 | ;;; #x??????X0 last saved vector register
|
|---|
| 789 | ;;; #x??????Y0 (possibly) 8 bytes wasted for alignment.
|
|---|
| 790 | ;;; #x???????? UNKNOWN; not necessarily the previous tstack frame
|
|---|
| 791 | ;;;
|
|---|
| 792 | ;;; Use the specified immediate register to build the frame.
|
|---|
| 793 | ;;; Save the caller's VRSAVE in the frame.
|
|---|
| 794 |
|
|---|
| 795 | (defppclapmacro %build-vrsave-frame (n tempreg)
|
|---|
| 796 | (if (or (> n 0) *altivec-lapmacros-maintain-vrsave-p*)
|
|---|
| 797 | (if (zerop n)
|
|---|
| 798 | ;; Just make room for vrsave; no need to align to 16-byte boundary.
|
|---|
| 799 | `(progn
|
|---|
| 800 | (stwu tsp -16 tsp)
|
|---|
| 801 | (stw tsp 4 tsp))
|
|---|
| 802 | `(progn
|
|---|
| 803 | (la ,tempreg ,(- (ash (1+ n) 4)) ppc::tsp)
|
|---|
| 804 | (clrrwi ,tempreg ,tempreg 4) ; align to 16-byte boundary
|
|---|
| 805 | (sub ,tempreg ,tempreg ppc32::tsp) ; calculate (aligned) frame size.
|
|---|
| 806 | (stwux ppc::tsp ppc::tsp ,tempreg)
|
|---|
| 807 | (stw ppc::tsp 4 ppc::tsp))) ; non-zero: non-lisp
|
|---|
| 808 | `(progn)))
|
|---|
| 809 |
|
|---|
| 810 | ;;; Save the current value of the VRSAVE spr in the newly-created
|
|---|
| 811 | ;;; tstack frame.
|
|---|
| 812 |
|
|---|
| 813 | (defppclapmacro %save-vrsave (tempreg)
|
|---|
| 814 | (if *altivec-lapmacros-maintain-vrsave-p*
|
|---|
| 815 | `(progn
|
|---|
| 816 | (mfspr ,tempreg 256) ; SPR 256 = vrsave
|
|---|
| 817 | (stw ,tempreg 8 tsp))
|
|---|
| 818 | `(progn)))
|
|---|
| 819 |
|
|---|
| 820 |
|
|---|
| 821 |
|
|---|
| 822 | ;;; When this is expanded, "tempreg" should contain the caller's vrsave.
|
|---|
| 823 | (defppclapmacro %update-vrsave (tempreg mask)
|
|---|
| 824 | (let* ((mask-high (ldb (byte 16 16) mask))
|
|---|
| 825 | (mask-low (ldb (byte 16 0) mask)))
|
|---|
| 826 | `(progn
|
|---|
| 827 | ,@(unless (zerop mask-high) `((oris ,tempreg ,tempreg ,mask-high)))
|
|---|
| 828 | ,@(unless (zerop mask-low) `((ori ,tempreg ,tempreg ,mask-low)))
|
|---|
| 829 | (mtspr 256 ,tempreg))))
|
|---|
| 830 |
|
|---|
| 831 | ;;; Save each of the vector regs in "nvrs" into the current tstack
|
|---|
| 832 | ;;; frame, starting at offset 16
|
|---|
| 833 | (defppclapmacro %save-vector-regs (nvrs tempreg)
|
|---|
| 834 | (let* ((insts ()))
|
|---|
| 835 | (do* ((offset 16 (+ 16 offset))
|
|---|
| 836 | (regs nvrs (cdr regs)))
|
|---|
| 837 | ((null regs) `(progn ,@(nreverse insts)))
|
|---|
| 838 | (declare (fixnum offset))
|
|---|
| 839 | (push `(la ,tempreg ,offset ppc::tsp) insts)
|
|---|
| 840 | (push `(stvx ,(car regs) ppc::rzero ,tempreg) insts))))
|
|---|
| 841 |
|
|---|
| 842 |
|
|---|
| 843 | ;;; Pretty much the same idea, only we restore VRSAVE first and
|
|---|
| 844 | ;;; discard the tstack frame after we've reloaded the vector regs.
|
|---|
| 845 | (defppclapmacro %restore-vector-regs (nvrs tempreg)
|
|---|
| 846 | (let* ((loads ()))
|
|---|
| 847 | (do* ((offset 16 (+ 16 offset))
|
|---|
| 848 | (regs nvrs (cdr regs)))
|
|---|
| 849 | ((null regs) `(progn
|
|---|
| 850 | ,@ (when *altivec-lapmacros-maintain-vrsave-p*
|
|---|
| 851 | `((progn
|
|---|
| 852 | (lwz ,tempreg 8 ppc::tsp)
|
|---|
| 853 | (mtspr 256 ,tempreg))))
|
|---|
| 854 | ,@(nreverse loads)
|
|---|
| 855 | (lwz ppc::tsp 0 ppc::tsp)))
|
|---|
| 856 | (declare (fixnum offset))
|
|---|
| 857 | (push `(la ,tempreg ,offset ppc::tsp) loads)
|
|---|
| 858 | (push `(lvx ,(car regs) ppc::rzero ,tempreg) loads))))
|
|---|
| 859 |
|
|---|
| 860 |
|
|---|
| 861 | (defun %extract-non-volatile-vector-registers (vector-reg-list)
|
|---|
| 862 | (let* ((nvrs ()))
|
|---|
| 863 | (dolist (reg vector-reg-list (nreverse nvrs))
|
|---|
| 864 | (let* ((regval (ppc-vector-register-name-or-expression reg)))
|
|---|
| 865 | (unless (typep regval '(mod 32))
|
|---|
| 866 | (error "Bad AltiVec register - ~s" reg))
|
|---|
| 867 | (when (>= regval 20)
|
|---|
| 868 | (pushnew regval nvrs))))))
|
|---|
| 869 |
|
|---|
| 870 |
|
|---|
| 871 | ;;; One could imagine something more elaborate:
|
|---|
| 872 | ;;; 1) Binding a global bitmask that represents the assembly-time notion
|
|---|
| 873 | ;;; of VRSAVE's contents; #'ppc-vector-register-name-or-expression
|
|---|
| 874 | ;;; could then warn if a vector register wasn't marked as active.
|
|---|
| 875 | ;;; Maybe a good idea, but PPC-LAP would have to bind that special
|
|---|
| 876 | ;;; variable to 0 to make things reentrant.
|
|---|
| 877 | ;;; 2) Binding a user-specified variable to the list of NVRs that need
|
|---|
| 878 | ;;; to be restored, so that it'd be more convenient to insert one's
|
|---|
| 879 | ;;; own calls to %RESTORE-VECTOR-REGS at appropriate points.
|
|---|
| 880 | ;;; Ad infinitum. As is, this allows one to execute a "flat" body of code
|
|---|
| 881 | ;;; that's bracketed by the stuff needed to keep VRSAVE in sync and
|
|---|
| 882 | ;;; to save and restore any non-volatile vector registers specified.
|
|---|
| 883 | ;;; That body of code is "flat" in the sense that it doesn't return,
|
|---|
| 884 | ;;; tail-call, establish a catch or unwind-protect frame, etc.
|
|---|
| 885 | ;;; It -can- contain lisp or foreign function calls.
|
|---|
| 886 |
|
|---|
| 887 | (defppclapmacro %with-altivec-registers ((&key (immreg 'ppc::imm0)) reglist &body body)
|
|---|
| 888 | (let* ((mask (%vr-register-mask reglist))
|
|---|
| 889 | (nvrs (%extract-non-volatile-vector-registers reglist))
|
|---|
| 890 | (num-nvrs (length nvrs)))
|
|---|
| 891 | (if (or *altivec-lapmacros-maintain-vrsave-p* nvrs)
|
|---|
| 892 | `(progn
|
|---|
| 893 | (%build-vrsave-frame ,num-nvrs ,immreg)
|
|---|
| 894 | (%save-vrsave ,immreg)
|
|---|
| 895 | ,@ (if *altivec-lapmacros-maintain-vrsave-p*
|
|---|
| 896 | `((%update-vrsave ,immreg ,mask)))
|
|---|
| 897 | (%save-vector-regs ,nvrs ,immreg)
|
|---|
| 898 | (progn ,@body)
|
|---|
| 899 | (%restore-vector-regs ,nvrs ,immreg))
|
|---|
| 900 | `(progn ,@body))))
|
|---|
| 901 |
|
|---|
| 902 |
|
|---|
| 903 | (defppclapmacro with-altivec-registers (reglist &body body)
|
|---|
| 904 | "Specify the set of AltiVec registers used in body. If
|
|---|
| 905 | *altivec-lapmacros-maintain-vrsave-p* is true when the macro is expanded,
|
|---|
| 906 | generates code to save the VRSAVE SPR and updates VRSAVE to incude a
|
|---|
| 907 | bitmask generated from the specified register list. Generates code which
|
|---|
| 908 | saves any non-volatile vector registers which appear in the register list,
|
|---|
| 909 | executes body, and restores the saved non-volatile vector registers (and,
|
|---|
| 910 | if *altivec-lapmacros-maintain-vrsave-p* is true, restores VRSAVE as well.
|
|---|
| 911 | Uses the IMM0 register (r3) as a temporary."
|
|---|
| 912 | `(%with-altivec-registers () ,reglist ,@body))
|
|---|
| 913 |
|
|---|
| 914 |
|
|---|
| 915 | ;;; Create an aligned buffer on the temp stack, large enough for N vector
|
|---|
| 916 | ;;; registers. Make base be a pointer to this buffer (base can be
|
|---|
| 917 | ;;; any available GPR, since the buffer will be fixnum-tagged.) N should
|
|---|
| 918 | ;;; be a constant.
|
|---|
| 919 | ;;; The intent here is that the register 'base' can be used in subsequent
|
|---|
| 920 | ;;; stvx/lvx instructions. Any vector registers involved in such instructions
|
|---|
| 921 | ;;; must have their corresponding bits saved in VRSAVE on platforms where
|
|---|
| 922 | ;;; that matters.
|
|---|
| 923 |
|
|---|
| 924 | (defppclapmacro allocate-vector-buffer (base n)
|
|---|
| 925 | `(progn
|
|---|
| 926 | (stwux tsp (- (ash (1+ ,n) 4))) ; allocate a frame on temp stack
|
|---|
| 927 | (stw tsp 4 tsp) ; temp frame contains immediate data
|
|---|
| 928 | (la ,base (+ 8 8) tsp) ; skip header, round up
|
|---|
| 929 | (clrrwi ,base ,base 4))) ; align (round down)
|
|---|
| 930 |
|
|---|
| 931 | ;;; Execute the specified body of code; on entry to that body, BASE
|
|---|
| 932 | ;;; will point to the lowest address of a vector-aligned buffer with
|
|---|
| 933 | ;;; room for N vector registers. On exit, the buffer will be
|
|---|
| 934 | ;;; deallocated. The body should preserve the value of BASE as long
|
|---|
| 935 | ;;; as it needs to reference the buffer.
|
|---|
| 936 |
|
|---|
| 937 | (defppclapmacro with-vector-buffer (base n &body body)
|
|---|
| 938 | "Generate code which allocates a 16-byte aligned buffer large enough
|
|---|
| 939 | to contain N vector registers; the GPR base points to the lowest address
|
|---|
| 940 | of this buffer. After processing body, the buffer will be deallocated.
|
|---|
| 941 | The body should preserve the value of base as long as it needs to
|
|---|
| 942 | reference the buffer. It's intended that base be used as a base register
|
|---|
| 943 | in stvx and lvx instructions within the body."
|
|---|
| 944 | `(progn
|
|---|
| 945 | (allocate-vector-buffer ,base ,n)
|
|---|
| 946 | (progn
|
|---|
| 947 | (progn ,@body)
|
|---|
| 948 | (unlink tsp))))
|
|---|
| 949 |
|
|---|
| 950 | #|
|
|---|
| 951 |
|
|---|
| 952 | ;;; This is just intended to test the macros; I can't test whether or not the code works.
|
|---|
| 953 |
|
|---|
| 954 | (defppclapfunction load-array ((n arg_z))
|
|---|
| 955 | (check-nargs 1)
|
|---|
| 956 | (with-altivec-registers (vr1 vr2 vr3 vr27) ; Clobbers imm0
|
|---|
| 957 | (li imm0 ppc32::misc-data-offset)
|
|---|
| 958 | (lvx vr1 arg_z imm0) ; load MSQ
|
|---|
| 959 | (lvsl vr27 arg_z imm0) ; set the permute vector
|
|---|
| 960 | (addi imm0 imm0 16) ; address of LSQ
|
|---|
| 961 | (lvx vr2 arg_z imm0) ; load LSQ
|
|---|
| 962 | (vperm vr3 vr1 vr2 vr27) ; aligned result appears in VR3
|
|---|
| 963 | (dbg t)) ; Look at result in some debugger
|
|---|
| 964 | (blr))
|
|---|
| 965 | |#
|
|---|
| 966 |
|
|---|
| 967 | ;;; see "Optimizing PowerPC Code" p. 156
|
|---|
| 968 | ;;; Note that the constant #x4330000080000000 is now in fp-s32conv
|
|---|
| 969 |
|
|---|
| 970 | (defppclapmacro int-to-freg (int freg imm)
|
|---|
| 971 | (target-arch-case
|
|---|
| 972 | (:ppc32
|
|---|
| 973 | `(let ((temp 8)
|
|---|
| 974 | (temp.h 8)
|
|---|
| 975 | (temp.l 12))
|
|---|
| 976 | (stwu tsp -16 tsp)
|
|---|
| 977 | (stw tsp 4 tsp)
|
|---|
| 978 | (stfd ppc::fp-s32conv temp tsp)
|
|---|
| 979 | (unbox-fixnum ,imm ,int)
|
|---|
| 980 | (xoris ,imm ,imm #x8000) ; invert sign of unboxed fixnum
|
|---|
| 981 | (stw ,imm temp.l tsp)
|
|---|
| 982 | (lfd ,freg temp tsp)
|
|---|
| 983 | (lwz tsp 0 tsp)
|
|---|
| 984 | (fsub ,freg ,freg ppc::fp-s32conv)))
|
|---|
| 985 | (:ppc64
|
|---|
| 986 | `(progn
|
|---|
| 987 | (unbox-fixnum ,imm ,int)
|
|---|
| 988 | (std ,imm -8 sp)
|
|---|
| 989 | (lfd ,freg -8 sp)
|
|---|
| 990 | (fcfid ,freg ,freg)))))
|
|---|
| 991 |
|
|---|
| 992 | ;;; Set the most significant bit in DEST, clear all other bits.
|
|---|
| 993 | (defppclapmacro load-highbit (dest)
|
|---|
| 994 | (target-arch-case
|
|---|
| 995 | (:ppc32
|
|---|
| 996 | `(lis ,dest #x8000))
|
|---|
| 997 | (:ppc64
|
|---|
| 998 | `(progn
|
|---|
| 999 | (lis ,dest #x8000)
|
|---|
| 1000 | (sldi ,dest ,dest 32)))))
|
|---|
| 1001 |
|
|---|
| 1002 | (defppclapmacro extract-bit-shift-count (dest src)
|
|---|
| 1003 | (target-arch-case
|
|---|
| 1004 | (:ppc32 `(clrlwi ,dest ,src (- 32 ppc32::bitmap-shift)))
|
|---|
| 1005 | (:ppc64 `(clrldi ,dest ,src (- 64 ppc64::bitmap-shift)))))
|
|---|
| 1006 |
|
|---|
| 1007 | ;;; "index" is the result of subtracting a base address from some
|
|---|
| 1008 | ;;; possibly tagged pointer. "bitwords" is the address of the first
|
|---|
| 1009 | ;;; word of an (untagged) bitvector.
|
|---|
| 1010 | (defppclapmacro set-bit-at-index (bitwords index &optional (mask ppc::imm3) (count ppc::imm4) (was ppc::imm1))
|
|---|
| 1011 | (let* ((done (gensym))
|
|---|
| 1012 | (again (gensym)))
|
|---|
| 1013 | `(progn
|
|---|
| 1014 | (load-highbit ,mask)
|
|---|
| 1015 | (srri ,index ,index ,(target-arch-case
|
|---|
| 1016 | (:ppc32 ppc32::dnode-shift)
|
|---|
| 1017 | (:ppc64 ppc64::dnode-shift)))
|
|---|
| 1018 | (extract-bit-shift-count ,count ,index)
|
|---|
| 1019 | (srr ,mask ,mask ,count)
|
|---|
| 1020 | (srri ,index ,index ,(target-arch-case
|
|---|
| 1021 | (:ppc32 ppc32::bitmap-shift)
|
|---|
| 1022 | (:ppc64 ppc64::bitmap-shift)))
|
|---|
| 1023 | (slri ,index ,index ,(target-arch-case
|
|---|
| 1024 | (:ppc32 ppc32::word-shift)
|
|---|
| 1025 | (:ppc64 ppc64::word-shift)))
|
|---|
| 1026 | (ldrx ,was ,bitwords ,index)
|
|---|
| 1027 | (and. ,was ,was ,mask)
|
|---|
| 1028 | (bne ,done)
|
|---|
| 1029 | ,again
|
|---|
| 1030 | (lrarx ,was ,bitwords ,index)
|
|---|
| 1031 | (or ,was ,was ,mask)
|
|---|
| 1032 | (strcx. ,was ,bitwords ,index)
|
|---|
| 1033 | (bne ,again)
|
|---|
| 1034 | ,done)))
|
|---|
| 1035 |
|
|---|
| 1036 | ;;; Like SET-BIT-AT-INDEX, but sets CR0[EQ] iff the index'th bit
|
|---|
| 1037 | ;;; is set.
|
|---|
| 1038 | (defppclapmacro test-bit-at-index (bitwords index &optional (mask ppc::imm3) (count ppc::imm4) (was ppc::imm1))
|
|---|
| 1039 | `(progn
|
|---|
| 1040 | (load-highbit ,mask)
|
|---|
| 1041 | (srri ,index ,index ,(target-arch-case
|
|---|
| 1042 | (:ppc32 ppc32::dnode-shift)
|
|---|
| 1043 | (:ppc64 ppc64::dnode-shift)))
|
|---|
| 1044 | (extract-bit-shift-count ,count ,index)
|
|---|
| 1045 | (srr ,mask ,mask ,count)
|
|---|
| 1046 | (srri ,index ,index ,(target-arch-case
|
|---|
| 1047 | (:ppc32 ppc32::bitmap-shift)
|
|---|
| 1048 | (:ppc64 ppc64::bitmap-shift)))
|
|---|
| 1049 | (slri ,index ,index ,(target-arch-case
|
|---|
| 1050 | (:ppc32 ppc32::word-shift)
|
|---|
| 1051 | (:ppc64 ppc64::word-shift)))
|
|---|
| 1052 | (ldrx ,was ,bitwords ,index)
|
|---|
| 1053 | (and. ,mask ,was ,mask)))
|
|---|
| 1054 |
|
|---|
| 1055 |
|
|---|
| 1056 | (provide "PPC-LAPMACROS")
|
|---|
| 1057 |
|
|---|
| 1058 | ;;; end of ppc-lapmacros.lisp
|
|---|
