source: branches/1.1/ccl/compiler/PPC/ppc-asm.lisp

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1;;;-*- Mode: Lisp; Package: (PPC :use CL) -*-
2;;;
3;;; Copyright (C) 1994-2001 Digitool, Inc
4;;; This file is part of OpenMCL.
5;;;
6;;; OpenMCL is licensed under the terms of the Lisp Lesser GNU Public
7;;; License , known as the LLGPL and distributed with OpenMCL as the
8;;; file "LICENSE". The LLGPL consists of a preamble and the LGPL,
9;;; which is distributed with OpenMCL as the file "LGPL". Where these
10;;; conflict, the preamble takes precedence.
11;;;
12;;; OpenMCL is referenced in the preamble as the "LIBRARY."
13;;;
14;;; The LLGPL is also available online at
15;;; http://opensource.franz.com/preamble.html
16
17
18(cl:eval-when (:compile-toplevel :execute)
19 (require "PPC-ARCH"))
20
21(in-package "PPC")
22
23(eval-when (:compile-toplevel :load-toplevel :execute)
24 (require "RISC-LAP")
25(ccl::defenum ()
26 $ppc-operand-signed ; This operand takes signed values.
27 $ppc-operand-signopt ; This operand takes signed or positive values.
28 $ppc-operand-cr ; This operand uses symbolic names for CR fields
29 $ppc-operand-gpr ; This operand is a GPR.
30 $ppc-operand-fpr ; This operand is an FPR.
31 $ppc-operand-relative ; This operand is a relative branch offset.
32 $ppc-operand-absolute ; This operand is an absolute address.
33 $ppc-operand-optional ; This operand is optional, defaulting to 0.
34 $ppc-operand-next ; A brutal hack to make some rotate instructions work.
35 $ppc-operand-negative ; This operand should be treated as negative wrt overflow checking.
36 $ppc-operand-fake ; Used to signify operands whose value is that of another operand.
37 $ppc-operand-parens ; Operand should be enclosed in parens in traditional as syntax.
38 $ppc-operand-source ; Operand value is read by the instruction
39 $ppc-operand-dest ; Operand value is written by the instruction
40 $ppc-operand-vr ; Operand is an Altivec vector register
41 )
42
43(ccl::defenum ()
44 $ppc ; Opcode is defined for the PowerPC architecture.
45 $b32 ; Opcode is only defined on 32 bit architectures.
46 $b64 ; Opcode is only defined on 64 bit architectures.
47)
48
49 ;;; A macro to extract the major opcode from an instruction.
50(defmacro major-opcode (i) `(ldb (byte 6 26) ,i))
51
52;; Operand class indices.
53(ccl::defenum ()
54 $unused
55 $ba ; the BA field in an XL form instruction.
56 $bat ; The BA field in an XL form instruction when it
57 ; must be the same as the BT field in the same instruction.
58 $bb ; The BB field in an XL form instruction.
59 $bba ; The BB field in an XL form instruction when it must be
60 ; the same as the BA field in the same instruction.
61 $bd ; The BD field in a B form instruction. The lower two
62 ; bits are forced to zero.
63 $bda ; The BD field in a B form instruction when absolute
64 ; addressing is used.
65 $bdm ; The BD field in a B form instruction when the - modifier
66 ; is used. This sets the y bit of the BO field appropriately.
67 $bdma ; The BD field in a B form instruction when the - modifier is used
68 ; and absolute addressing is used.
69 $bdp ; The BD field in a B form instruction when the + modifier
70 ; is used. This sets the y bit of the BO field appropriately.
71 $bdpa ; The BD field in a B form instruction when the + modifier is used
72 ; and absolute addressing is used.
73 $bf ; The BF field in an X or XL form instruction.
74 $obf ; An optional BF field. This is used for comparison instructions,
75 ; in which an omitted BF field is taken as zero.
76 $bfa ; The BFA field in an X or XL form instruction.
77 $bi ; The BI field in a B form or XL form instruction.
78 $bo ; The BO field in a B form instruction. Certain values are illegal.
79 $boe ; The BO field in a B form instruction when the + or - modifier is
80 ; used. This is like the BO field, but it must be even.
81 $bt ; The BT field in an X or XL form instruction.
82 $cr ; The condition register number portion of the BI field in a B form
83 ; or XL form instruction. This is used for the extended
84 ; conditional branch mnemonics, which set the lower two bits of the
85 ; BI field. This field is optional.
86 $d ; The D field in a D form instruction. This is a displacement off
87 ; a register, and implies that the next operand is a register in
88 ; parentheses.
89 $ds ; The DS field in a DS form instruction. This is like D, but the
90 ; lower two bits are forced to zero.
91 $flm ; The FLM field in an XFL form instruction.
92 $fra ; The FRA field in an X or A form instruction.
93 $frb ; The FRB field in an X or A form instruction.
94 $frc ; The FRC field in an A form instruction.
95 $frs ; The FRS field in an X form instruction
96 $frt ; The FRT field in a D, X or A form instruction.
97 $fxm ; The FXM field in an XFX instruction.
98 $l ; The L field in a D or X form instruction.
99 $li ; The LI field in an I form instruction. The lower two bits are
100 ; forced to zero.
101 $lia ; The LI field in an I form instruction when used as an absolute
102 ; address.
103 $mb ; The MB field in an M form instruction.
104 $me ; The ME field in an M form instruction.
105 $mbe ; The MB and ME fields in an M form instruction expressed a single
106 ; operand which is a bitmask indicating which bits to select. This
107 ; is a two operand form using $PPC-OPERAND-NEXT. See the
108 ; description of $PPC-OPERAND-NEXT. for what this means.
109 $mbe-aux ; A placeholder for the second MBE operand.
110 $mb6 ; The MB or ME field in an MD or MDS form instruction. The high
111 ; bit is wrapped to the low end.
112 $nb ; The NB field in an X form instruction. The value 32 is stored as 0.
113 $nsi ; The NSI field in a D form instruction. This is the same as the
114 ; SI field, only negated.
115 $ra ; The RA field in an D, DS, X, XO, M, or MDS form instruction.
116 $ral ; The RA field in a D or X form instruction which is an updating
117 ; load, which means that the RA field may not be zero and may not
118 ; equal the RT field.
119 $ram ; The RA field in an lmw instruction, which has special value
120 ; restrictions.
121 $ras ; The RA field in a D or X form instruction which is an updating
122 ; store or an updating floating point load, which means that the RA
123 ; field may not be zero.
124 $rTa ; The RA field in an D, DS, X, XO, M, or MDS form instruction, when
125 ; used as a destination.
126 $rb ; The RB field in an X, XO, M, or MDS form instruction.
127 $rbs ; The RB field in an X form instruction when it must be the same as
128 ; the RS field in the instruction. This is used for extended
129 ; mnemonics like mr.
130 $rs ; The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
131 ; instruction.
132 $rt ; The RT field in a D, DS, X, XFX or XO form instruction.
133 $sh ; The SH field in an X or M form instruction.
134 $sh6 ; The SH field in an MD form instruction. This is split.
135 $si ; The SI field in a D form instruction.
136 $sisignopt ; The SI field in a D form instruction when we accept a wide range
137 ; of positive values.
138 $spr ; The SPR or TBR field in an XFX form instruction. This is
139 ; flipped--the lower 5 bits are stored in the upper 5 and vice-
140 ; versa.
141 $sr ; The SR field in an X form instruction.
142 $to ; The TO field in a D or X form instruction.
143 $u ; The U field in an X form instruction.
144 $ui ; The UI field in a D form instruction.
145 $uuo-code ; UUO extended-operation code.
146 $uuo-errnum
147 $uuo-small-errnum
148 $va ; The vA field in a vector instruction
149 $vb ; The vB field in a vector instruction
150 $vc ; the vC field in a vector VA form instruction
151 $vd ; the vD field in a vector instruction
152 $vs ; the vS field in a vector instruction
153 $vsh ; the SH field in a vector instruction
154 $all/transient ; the all/transient bit in a vector data stream instruction
155 $strm ; the strm field in a vector data stream instruction
156 $vsimm ; a 5-bit signed immediate that goes in the vA field
157 $vuimm ; a 5-bit unsigned immediate that goes in the vA field
158 $ls ; The LS field in an X (sync) form instruction
159
160 )
161
162(defconstant $me6 $mb6)
163(defconstant $tbr $spr)
164
165(defmacro defopmask (name width offset)
166 `(defconstant ,name (mask-field (byte ,width ,offset) -1)))
167
168(defopmask $ba-mask 5 16)
169(defopmask $bb-mask 5 11)
170(defopmask $bi-mask 5 16)
171(defopmask $bo-mask 5 21)
172(defopmask $fra-mask 5 16)
173(defopmask $frb-mask 5 11)
174(defopmask $frc-mask 5 6)
175(defopmask $mb-mask 5 6)
176(defopmask $me-mask 5 1)
177(defopmask $mb6-mask 6 5)
178(defopmask $ra-mask 5 16)
179(defopmask $rb-mask 5 11)
180(defopmask $rt-mask 5 21)
181(defopmask $sh-mask 5 11)
182(defconstant $sh6-mask (logior (mask-field (byte 1 1) -1) (mask-field (byte 5 11) -1)))
183(defopmask $spr-mask 10 11)
184(defopmask $to-mask 5 21)
185(defopmask $uuo-code-mask 7 4)
186(defopmask $uuo-interr-mask 10 16)
187(defopmask $uuo-small-interr-mask 5 21)
188(defopmask $vsimm-mask 5 16)
189(defopmask $vuimm-mask 5 16)
190
191)
192
193
194
195
196(eval-when (:compile-toplevel :execute)
197 (defmacro ppc-op (index width offset &optional insert-function extract-function &rest flags)
198 `(ccl::make-operand :index ,index
199 :width ,width
200 :offset ,offset
201 :insert-function ',insert-function
202 :extract-function ',extract-function
203 :flags (logior ,@(mapcar #'(lambda (f) `(ash 1 ,f)) flags)))))
204
205
206(eval-when (:compile-toplevel :load-toplevel :execute)
207(defparameter *ppc-operands*
208 (vector
209 (ppc-op $unused 0 0)
210 (ppc-op $ba 5 16 nil nil $ppc-operand-cr)
211 (ppc-op $bat 5 16 insert-bat extract-bat ccl::operand-fake)
212 (ppc-op $bb 5 11 nil nil $ppc-operand-cr)
213 (ppc-op $bba 5 11 insert-bba extract-bba ccl::operand-fake)
214 (ppc-op $bd 16 0 insert-bd extract-bd $ppc-operand-relative $ppc-operand-signed)
215 (ppc-op $bda 16 0 insert-bd extract-bd $ppc-operand-absolute $ppc-operand-signed)
216 (ppc-op $bdm 16 0 insert-bdm extract-bdm $ppc-operand-relative $ppc-operand-signed)
217 (ppc-op $bdma 16 0 insert-bdm extract-bdm $ppc-operand-absolute $ppc-operand-signed)
218 (ppc-op $bdp 16 0 insert-bdp extract-bdp $ppc-operand-relative $ppc-operand-signed)
219 (ppc-op $bdpa 16 0 insert-bdp extract-bdp $ppc-operand-absolute $ppc-operand-signed)
220 (ppc-op $bf 3 23 insert-bf extract-bf $ppc-operand-cr)
221 (ppc-op $obf 3 23 insert-bf extract-bf $ppc-operand-cr ccl::operand-optional)
222 (ppc-op $bfa 3 18 insert-cr extract-cr $ppc-operand-cr)
223 (ppc-op $bi 5 16 nil nil $ppc-operand-cr)
224 (ppc-op $bo 5 21 insert-bo extract-bo)
225 (ppc-op $boe 5 21 insert-boe extract-boe)
226 (ppc-op $bt 5 21 nil nil $ppc-operand-cr)
227 (ppc-op $cr 5 16 insert-cr extract-cr $ppc-operand-cr ccl::operand-optional)
228 (ppc-op $d 16 0 nil nil $ppc-operand-parens $ppc-operand-signed)
229 (ppc-op $ds 16 0 insert-ds extract-ds $ppc-operand-parens $ppc-operand-signed)
230 (ppc-op $flm 8 17)
231 (ppc-op $fra 5 16 nil nil $ppc-operand-fpr $ppc-operand-source)
232 (ppc-op $frb 5 11 nil nil $ppc-operand-fpr $ppc-operand-source)
233 (ppc-op $frc 5 6 nil nil $ppc-operand-fpr $ppc-operand-source)
234 (ppc-op $frs 5 21 nil nil $ppc-operand-fpr $ppc-operand-source)
235 (ppc-op $frt 5 21 nil nil $ppc-operand-fpr $ppc-operand-dest)
236 (ppc-op $fxm 8 12)
237 (ppc-op $l 1 21 nil nil ccl::operand-optional)
238 (ppc-op $li 26 0 insert-li extract-li $ppc-operand-relative $ppc-operand-signed)
239 (ppc-op $lia 26 0 insert-li extract-li $ppc-operand-absolute $ppc-operand-signed)
240 (ppc-op $mb 5 6)
241 (ppc-op $me 5 1 )
242 (ppc-op $mbe 5 6 nil nil ccl::operand-optional $ppc-operand-next)
243 (ppc-op $mbe-aux 32 0 insert-mbe extract-mbe)
244 (ppc-op $mb6 6 5 insert-mb6 extract-mb6)
245 (ppc-op $nb 6 11 insert-nb extract-nb)
246 (ppc-op $nsi 16 0 insert-nsi extract-nsi $ppc-operand-negative $ppc-operand-signed)
247 (ppc-op $ra 5 16 nil nil $ppc-operand-gpr $ppc-operand-source)
248 (ppc-op $ral 5 16 insert-ral nil $ppc-operand-gpr $ppc-operand-source)
249 (ppc-op $ram 5 16 insert-ram nil $ppc-operand-gpr $ppc-operand-source)
250 (ppc-op $ras 5 16 insert-ras nil $ppc-operand-gpr $ppc-operand-source)
251 (ppc-op $rTa 5 16 nil nil $ppc-operand-gpr $ppc-operand-dest)
252 (ppc-op $rb 5 11 nil nil $ppc-operand-gpr $ppc-operand-source)
253 (ppc-op $rbs 5 11 insert-rbs extract-rbs ccl::operand-fake)
254 (ppc-op $rs 5 21 nil nil $ppc-operand-gpr $ppc-operand-source)
255 (ppc-op $rt 5 21 nil nil $ppc-operand-gpr $ppc-operand-dest)
256 (ppc-op $sh 5 11)
257 (ppc-op $sh6 6 1 insert-sh6 extract-sh6)
258 (ppc-op $si 16 0 nil nil $ppc-operand-signed)
259 (ppc-op $sisignopt 16 0 nil nil $ppc-operand-signed $ppc-operand-signopt)
260 (ppc-op $spr 10 11 insert-spr extract-spr)
261 (ppc-op $sr 4 16)
262 (ppc-op $to 5 21)
263 (ppc-op $u 4 12)
264 (ppc-op $ui 16 0)
265 (ppc-op $uuo-code 7 4)
266 (ppc-op $uuo-errnum 10 16)
267 (ppc-op $uuo-small-errnum 5 21)
268 (ppc-op $va 5 16 nil nil $ppc-operand-vr $ppc-operand-source)
269 (ppc-op $vb 5 11 nil nil $ppc-operand-vr $ppc-operand-source)
270 (ppc-op $vc 5 6 nil nil $ppc-operand-vr $ppc-operand-source)
271 (ppc-op $vd 5 21 nil nil $ppc-operand-vr $ppc-operand-dest)
272 (ppc-op $vs 5 21 nil nil $ppc-operand-vr $ppc-operand-source)
273 (ppc-op $vsh 4 6 nil nil)
274 (ppc-op $all/transient 1 25 nil nil)
275 (ppc-op $strm 2 21 nil nil)
276 (ppc-op $vsimm 5 16 nil nil $ppc-operand-signed)
277 (ppc-op $vuimm 5 16 nil nil)
278 (ppc-op $ls 21 2 nil nil ccl::operand-optional)
279
280 ))
281
282
283(eval-when (:load-toplevel :execute)
284 (dotimes (i (length *ppc-operands*))
285 (unless (= i (ccl::operand-index (svref *ppc-operands* i)))
286 (break "Operand table out-of-synch at ~d : ~s. " i (svref *ppc-operands* i)))))
287
288)
289
290(eval-when (:compile-toplevel :execute)
291;; The main opcode of an instruction.
292(defmacro op (x &optional (base 0)) `(dpb ,x (byte 6 26) ,base))
293(defconstant $op-mask (mask-field (byte 6 26) -1))
294
295;; The main opcode combined with a trap code in the TO field
296;; of a D form instruction. Used for extended mnemonics for
297;; the trap instructions.
298(defmacro opto (x to) `(op ,x (dpb ,to (byte 5 21) 0)))
299(defconstant $opto-mask (opto -1 -1))
300
301;; The main opcode combined with a comparison size bit in the L field
302;; of a D form or X form instruction. Used for extended mnemonics for
303;; the comparison instructions.
304(defmacro opl (x l) `(op ,x (dpb ,l (byte 1 21) 0)))
305(defconstant $opl-mask (opl -1 -1))
306
307;; An A form instruction.
308(defmacro a (op xop rc) `(op ,op (dpb ,xop (byte 5 1) (logand ,rc 1))))
309(defconstant $a-mask (a -1 -1 -1))
310
311;; An A-MASK with the FRB field fixed.
312(defconstant $afrb-mask (logior $a-mask $frb-mask))
313
314;; An A-MASK with the FRC field fixed.
315(defconstant $afrc-mask (logior $a-mask $frc-mask))
316
317;; An A-MASK with the FRA and FRC fields fixed.
318(defconstant $afrafrc-mask (logior $a-mask $fra-mask $frc-mask))
319
320;; A B form instruction.
321(defmacro b (op aa lk) `(op ,op (dpb ,aa (byte 1 1) (logand ,lk 1))))
322(defconstant $b-mask (b -1 -1 -1))
323
324;; A B form instruction setting the BO field.
325(defmacro bbo (op bo aa lk)
326 `(op ,op (dpb ,bo (byte 5 21) (dpb ,aa (byte 1 1) (logand ,lk 1)))))
327(defconstant $bbo-mask (bbo -1 -1 -1 -1))
328
329;; A BBO-MASK with the y bit of the BO field removed. This permits
330;; matching a conditional branch regardless of the setting of the y
331;; bit.
332(defconstant $y-mask (dpb 1 (byte 1 21) 0))
333(defconstant $bboy-mask (logandc2 $bbo-mask $y-mask))
334
335;; A B form instruction setting the BO field and the condition bits of
336;; the BI field.
337(defmacro bbocb (op bo cb aa lk)
338 `(op ,op (dpb ,bo (byte 5 21) (dpb ,cb (byte 2 16) (dpb ,aa (byte 1 1) (logand ,lk 1))))))
339(defconstant $bbocb-mask (bbocb -1 -1 -1 -1 -1))
340
341;; A BBOCB-MASK with the y bit of the BO field removed.
342(defconstant $bboycb-mask (logandc2 $bbocb-mask $y-mask))
343
344;; A BBOYCB-MASK in which the BI field is fixed.
345(defconstant $bboybi-mask (logior $bboycb-mask $bi-mask))
346
347;; The main opcode mask with the RA field clear.
348(defconstant $DRA-MASK (logior $op-mask $ra-mask))
349
350;; A DS form instruction.
351(defmacro dso (op xop) `(op ,op (logand ,xop #x3)))
352(defconstant $ds-mask (dso -1 -1))
353
354;; An M form instruction.
355(defmacro m (op &optional (rc 0)) `(op ,op (logand ,rc 1)))
356(defconstant $m-mask (m -1 -1))
357
358;; An M form instruction with the ME field specified.
359(defmacro mme (op me &optional (rc 0)) `(op ,op (dpb ,me (byte 5 1) (logand ,rc 1))))
360
361;; An M-MASK with the MB and ME fields fixed.
362(defconstant $mmbme-mask (logior $m-mask $mb-mask $me-mask))
363
364;; An M-MASK with the SH and ME fields fixed.
365(defconstant $mshme-mask (logior $m-mask $sh-mask $me-mask))
366
367;; An MD form instruction.
368(defmacro md (op xop &optional (rc 0)) `(op ,op (dpb ,xop (byte 3 2) (logand ,rc 1))))
369(defconstant $md-mask (md -1 -1 -1))
370
371;; An MD-MASK with the MB field fixed.
372(defconstant $mdmb-mask (logior $md-mask $mb6-mask))
373
374;; An MD-MASK with the SH field fixed.
375(defconstant $mdsh-mask (logior $md-mask $sh6-mask))
376
377;; An MDS form instruction.
378(defmacro mds (op xop &optional (rc 0)) `(op ,op (dpb ,xop (byte 4 1) (logand ,rc 1))))
379(defconstant $mds-mask (mds -1 -1 -1))
380
381;; An MDS-MASK with the MB field fixed.
382(defconstant $mdsmb-mask (logior $mds-mask $mb6-mask))
383
384;; An SC form instruction.
385(defmacro sc (op sa lk) `(op ,op (dpb ,sa (byte 1 1) (logand ,lk 1))))
386(defconstant $sc-mask (sc -1 -1 -1))
387
388;; A UUO is an unimplemented instruction that the exception handler
389;; decodes and emulates. The major opcode and low three bits are clear;
390;; bit 3 is set.
391
392(defmacro uuo (xop) `(op 0 (dpb ,xop (byte 7 4) (logior (ash 1 3) ppc32::fulltag-imm))))
393(defconstant $uuo-mask (logior $op-mask (uuo -1)))
394(defconstant $uuorb-mask (logior $uuo-mask $rb-mask))
395
396;; An X form instruction.
397(defmacro x (op xop &optional (base 0)) `(op ,op (dpb ,xop (byte 10 1) ,base)))
398
399;; An X form instruction with the RC bit specified.
400(defmacro xrc (op xop &optional (rc 0)) `(op ,op (dpb ,xop (byte 10 1) (logand ,rc 1))))
401
402;; The mask for an X form instruction.
403(defconstant $x-mask (xrc -1 -1 -1))
404
405;; An X-MASK with the RA field fixed.
406(defconstant $xra-mask (logior $x-mask $ra-mask))
407
408;; An X-MASK with the RB field fixed.
409(defconstant $xrb-mask (logior $x-mask $rb-mask))
410
411;; An X-MASK with the RT field fixed.
412(defconstant $xrt-mask (logior $x-mask $rt-mask))
413
414;; An X-MASK with the RA and RB fields fixed.
415(defconstant $xrarb-mask (logior $x-mask $ra-mask $rb-mask))
416
417;; An X-MASK with the RT and RA fields fixed.
418(defconstant $xrtra-mask (logior $x-mask $rt-mask $ra-mask))
419
420;; An X form comparison instruction.
421(defmacro xcmpl (op xop l)
422 `(x ,op ,xop (dpb ,l (byte 1 21) 0)))
423
424;; The mask for an X form comparison instruction.
425(defconstant $xcmp-mask (logior $x-mask (ash 1 22)))
426
427;; The mask for an X form comparison instruction with the L field
428;; fixed.
429(defconstant $xcmpl-mask (logior $xcmp-mask (ash 1 21)))
430
431(defmacro xsync (op xop l) `(x ,op ,xop (dpb ,l (byte 3 21) 0)))
432(defconstant $xsync-mask #xff9fffff)
433
434;; An X form trap instruction with the TO field specified.
435(defmacro xto (op xop to) `(x ,op ,xop (dpb ,to (byte 5 21) 0)))
436(defconstant $xto-mask (xto -1 -1 -1))
437
438;; An XFL form instruction.
439(defmacro xfl (op xop &optional (rc 0)) `(op ,op (dpb ,xop (byte 10 1) (logand ,rc 1))))
440(defconstant $xfl-mask (logior (xfl -1 -1 -1) (ash 1 25) (ash 1 16)))
441
442;; An XL form instruction with the LK field set to 0.
443(defmacro xl (op xop &optional (base 0)) `(op ,op (dpb ,xop (byte 10 1) ,base)))
444
445;; An XL form instruction which uses the LK field.
446(defmacro xllk (op xop &optional (lk 0)) `(xl ,op ,xop (logand ,lk 1)))
447
448;; The mask for an XL form instruction.
449(defconstant $xl-mask (xllk -1 -1 -1))
450
451;; An XL form instruction which explicitly sets the BO field.
452(defmacro xlo (op bo xop &optional (lk 0))
453 `(xl ,op ,xop (dpb ,bo (byte 5 21) (logand ,lk 1))))
454(defconstant $xlo-mask (logior $xl-mask $bo-mask))
455
456;; An XL form instruction which explicitly sets the y bit of the BO
457;; field.
458(defmacro xlylk (op xop y &optional (lk 0)) `(xl ,op ,xop (dpb ,y (byte 1 21) (logand ,lk 1))))
459(defconstant $xlylk-mask (logior $xl-mask $y-mask))
460
461;; An XL form instruction which sets the BO field and the condition
462;; bits of the BI field.
463(defmacro xlocb (op bo cb xop &optional (lk 0))
464 `(x ,op ,xop (dpb ,bo (byte 5 21) (dpb ,cb (byte 2 16) (logand ,lk 1)))))
465(defconstant $xlocb-mask (xlocb -1 -1 -1 -1 -1))
466
467;; An XL-MASK or XLYLK-MASK or XLOCB-MASK with the BB field fixed.
468(defconstant $xlbb-mask (logior $xl-mask $bb-mask))
469(defconstant $xlybb-mask (logior $xlylk-mask $bb-mask))
470(defconstant $xlbocbbb-mask (logior $xlocb-mask $bb-mask))
471
472;; An XL-MASK with the BO and BB fields fixed.
473(defconstant $xlbobb-mask (logior $xl-mask $bo-mask $bb-mask))
474
475;; An XL-MASK with the BO, BI and BB fields fixed.
476(defconstant $xlbobibb-mask (logior $xl-mask $bo-mask $bi-mask $bb-mask))
477
478;; An XO form instruction.
479(defmacro xo (op xop oe rc)
480 `(op ,op (dpb ,xop (byte 9 1) (dpb ,oe (byte 1 10) (logand ,rc 1)))))
481(defconstant $xo-mask (xo -1 -1 -1 -1))
482
483;; An XO-MASK with the RB field fixed.
484(defconstant $xorb-mask (logior $xo-mask $rb-mask))
485
486;; An XS form instruction.
487(defmacro xs (op xop &optional (rc 0))
488 `(op ,op (dpb ,xop (byte 9 2) (logand ,rc 1))))
489(defconstant $xs-mask (xs -1 -1 -1))
490
491;; An XFX form instruction with the SPR field filled in.
492(defmacro xspr (op xop spr) `(x ,op ,xop (dpb ,spr (byte 5 16) (ash (logand ,spr #x3e0) 6))))
493(defconstant $xspr-mask (logior $x-mask $spr-mask))
494
495;; A VX form instruction.
496(defmacro vx (op xop) `(op ,op (dpb ,xop (byte 11 0) 0)))
497(defconstant $vx-mask (vx -1 -1))
498
499;; A VXR form instruction.
500(defmacro vxr (op xop rc) `(op ,op (dpb ,xop (byte 10 0) (ash (logand ,rc 1) 10))))
501(defconstant $vxr-mask (vxr -1 -1 1))
502
503;; A VXA form instruction.
504(defmacro vxa (op xop &optional (base 0)) `(op ,op (dpb ,xop (byte 6 0) ,base)))
505(defconstant $vxa-mask (vxa -1 -1))
506(defconstant $vash-mask (logior $vxa-mask (ash 1 10)))
507
508
509
510
511
512;; The BO encodings used in extended conditional branch mnemonics.
513(defconstant $bodnzf #x0)
514(defconstant $bodnzfp #x1)
515(defconstant $bodzf #x2)
516(defconstant $bodzfp #x3)
517(defconstant $bof #x4)
518(defconstant $bofp #x5)
519(defconstant $bodnzt #x8)
520(defconstant $bodnztp #x9)
521(defconstant $bodzt #xa)
522(defconstant $bodztp #xb)
523(defconstant $bot #xc)
524(defconstant $botp #xd)
525(defconstant $bodnz #x10)
526(defconstant $bodnzp #x11)
527(defconstant $bodz #x12)
528(defconstant $bodzp #x13)
529(defconstant $bou #x14)
530
531;; The BI condition bit encodings used in extended conditional branch
532;; mnemonics.
533(defconstant $cblt 0)
534(defconstant $cbgt 1)
535(defconstant $cbeq 2)
536(defconstant $cbso 3)
537
538;; The TO encodings used in extended trap mnemonics.
539(defconstant $tolgt #x1)
540(defconstant $tollt #x2)
541(defconstant $toeq #x4)
542(defconstant $tolge #x5)
543(defconstant $tolnl #x5)
544(defconstant $tolle #x6)
545(defconstant $tolng #x6)
546(defconstant $togt #x8)
547(defconstant $toge #xc)
548(defconstant $tonl #xc)
549(defconstant $tolt #x10)
550(defconstant $tole #x14)
551(defconstant $tong #x14)
552(defconstant $tone #x18)
553(defconstant $tou #x1f)
554
555
556)
557
558
559
560(eval-when (:compile-toplevel :execute)
561(defun max-operand-count (opnums)
562 (let* ((max 0))
563 (declare (fixnum max))
564 (dolist (i opnums max)
565 (unless
566 (logbitp ccl::operand-fake (ccl::operand-flags (svref *ppc-operands* i)))
567 (incf max)))))
568
569(defun min-operand-count (opnums)
570 (let* ((min 0))
571 (declare (fixnum min))
572 (dolist (i opnums min)
573 (let* ((flags (ccl::operand-flags (svref *ppc-operands* i))))
574 (declare (fixnum flags))
575 (unless (or (logbitp ccl::operand-fake flags)
576 (logbitp ccl::operand-optional flags))
577 (incf min))))))
578
579(defmacro ppc-opcode (name opcode mask (&rest flags) &rest operands)
580 `(ccl::make-opcode
581 :name (string ',name)
582 :opcode ,opcode
583 :majorop (major-opcode ,opcode)
584 :mask ,mask
585 :flags (logior ,@(mapcar #'(lambda (f) `(ash 1 ,f)) flags))
586 :min-args (min-operand-count (list ,@operands))
587 :max-args (max-operand-count (list ,@operands))
588 :operands (mapcar #'(lambda (i) (svref *ppc-operands* i)) (list ,@operands))))
589)
590
591
592; The #.s are a necesary evil here (to keep the function vector size < 32K) in MCL 3.0.
593
594; If you change this, you need to evaluate (initialize-ppc-opcode-numbers)
595(defparameter *ppc-opcodes*
596 (vector
597 #.(ppc-opcode uuo_interr (uuo 11) $uuo-mask ($ppc) $uuo-errnum $rb)
598 #.(ppc-opcode uuo_intcerr (uuo 12) $uuo-mask ($ppc) $uuo-errnum $rb)
599 #.(ppc-opcode uuo_interr2 (uuo 13) $uuo-mask ($ppc) $uuo-small-errnum $ra $rb)
600 #.(ppc-opcode uuo_intcerr2 (uuo 14) $uuo-mask ($ppc) $uuo-small-errnum $ra $rb)
601 ;; We'll clearly need more; add a few "anonymous" ones for now so that
602 ;; other opcode's opcode numbers stay constant.
603 #.(ppc-opcode uuo_fpuXbinop (uuo 22) $uuo-mask ($ppc) $frt $fra $frb)
604
605 #.(ppc-opcode tdlgti (opto 2 $tolgt) $opto-mask ($ppc $b64) $ra $si)
606 #.(ppc-opcode tdllti (opto 2 $tollt) $opto-mask ($ppc $b64) $ra $si)
607 #.(ppc-opcode tdeqi (opto 2 $toeq) $opto-mask ($ppc $b64) $ra $si)
608 #.(ppc-opcode tdlgei (opto 2 $tolge) $opto-mask ($ppc $b64) $ra $si)
609 #.(ppc-opcode tdlnli (opto 2 $tolnl) $opto-mask ($ppc $b64) $ra $si)
610 #.(ppc-opcode tdllei (opto 2 $tolle) $opto-mask ($ppc $b64) $ra $si)
611 #.(ppc-opcode tdlngi (opto 2 $tolng) $opto-mask ($ppc $b64) $ra $si)
612 #.(ppc-opcode tdgti (opto 2 $togt) $opto-mask ($ppc $b64) $ra $si)
613 #.(ppc-opcode tdgei (opto 2 $toge) $opto-mask ($ppc $b64) $ra $si)
614 #.(ppc-opcode tdnli (opto 2 $tonl) $opto-mask ($ppc $b64) $ra $si)
615 #.(ppc-opcode tdlti (opto 2 $tolt) $opto-mask ($ppc $b64) $ra $si)
616 #.(ppc-opcode tdlei (opto 2 $tole) $opto-mask ($ppc $b64) $ra $si)
617 #.(ppc-opcode tdngi (opto 2 $tong) $opto-mask ($ppc $b64) $ra $si)
618 #.(ppc-opcode tdnei (opto 2 $tone) $opto-mask ($ppc $b64) $ra $si)
619 #.(ppc-opcode tdi (op 2) $op-mask ($ppc $b64) $to $ra $si)
620
621 #.(ppc-opcode twlgti (opto 3 $tolgt) $opto-mask ($ppc) $ra $si)
622 #.(ppc-opcode twllti (opto 3 $tollt) $opto-mask ($ppc) $ra $si)
623 #.(ppc-opcode tweqi (opto 3 $toeq) $opto-mask ($ppc) $ra $si)
624 #.(ppc-opcode twlgei (opto 3 $tolge) $opto-mask ($ppc) $ra $si)
625 #.(ppc-opcode twlnli (opto 3 $tolnl) $opto-mask ($ppc) $ra $si)
626 #.(ppc-opcode twllei (opto 3 $tolle) $opto-mask ($ppc) $ra $si)
627 #.(ppc-opcode twlngi (opto 3 $tolng) $opto-mask ($ppc) $ra $si)
628 #.(ppc-opcode twgti (opto 3 $togt) $opto-mask ($ppc) $ra $si)
629 #.(ppc-opcode twgei (opto 3 $toge) $opto-mask ($ppc) $ra $si)
630 #.(ppc-opcode twnli (opto 3 $tonl) $opto-mask ($ppc) $ra $si)
631 #.(ppc-opcode twlti (opto 3 $tolt) $opto-mask ($ppc) $ra $si)
632 #.(ppc-opcode twlei (opto 3 $tole) $opto-mask ($ppc) $ra $si)
633 #.(ppc-opcode twngi (opto 3 $tong) $opto-mask ($ppc) $ra $si)
634 #.(ppc-opcode twnei (opto 3 $tone) $opto-mask ($ppc) $ra $si)
635 #.(ppc-opcode twi (op 3) $op-mask ($ppc) $to $ra $si)
636
637 #.(ppc-opcode mfvscr (vx 4 1540) $vx-mask ($ppc) $vd )
638 #.(ppc-opcode mtvscr (vx 4 1604) $vx-mask ($ppc) $vd )
639 #.(ppc-opcode vaddcuw (vx 4 384) $vx-mask ($ppc) $vd $va $vb )
640 #.(ppc-opcode vaddfp (vx 4 10) $vx-mask ($ppc) $vd $va $vb )
641 #.(ppc-opcode vaddsbs (vx 4 768) $vx-mask ($ppc) $vd $va $vb )
642 #.(ppc-opcode vaddshs (vx 4 832) $vx-mask ($ppc) $vd $va $vb )
643 #.(ppc-opcode vaddsws (vx 4 896) $vx-mask ($ppc) $vd $va $vb )
644 #.(ppc-opcode vaddubm (vx 4 0) $vx-mask ($ppc) $vd $va $vb )
645 #.(ppc-opcode vaddubs (vx 4 512) $vx-mask ($ppc) $vd $va $vb )
646 #.(ppc-opcode vadduhm (vx 4 64) $vx-mask ($ppc) $vd $va $vb )
647 #.(ppc-opcode vadduhs (vx 4 576) $vx-mask ($ppc) $vd $va $vb )
648 #.(ppc-opcode vadduwm (vx 4 128) $vx-mask ($ppc) $vd $va $vb )
649 #.(ppc-opcode vadduws (vx 4 640) $vx-mask ($ppc) $vd $va $vb )
650 #.(ppc-opcode vand (vx 4 1028) $vx-mask ($ppc) $vd $va $vb )
651 #.(ppc-opcode vandc (vx 4 1092) $vx-mask ($ppc) $vd $va $vb )
652 #.(ppc-opcode vavgsb (vx 4 1282) $vx-mask ($ppc) $vd $va $vb )
653 #.(ppc-opcode vavgsh (vx 4 1346) $vx-mask ($ppc) $vd $va $vb )
654 #.(ppc-opcode vavgsw (vx 4 1410) $vx-mask ($ppc) $vd $va $vb )
655 #.(ppc-opcode vavgub (vx 4 1026) $vx-mask ($ppc) $vd $va $vb )
656 #.(ppc-opcode vavguh (vx 4 1090) $vx-mask ($ppc) $vd $va $vb )
657 #.(ppc-opcode vavguw (vx 4 1154) $vx-mask ($ppc) $vd $va $vb )
658 #.(ppc-opcode vcfsx (vx 4 842) $vx-mask ($ppc) $vd $vb $vuimm )
659 #.(ppc-opcode vcfux (vx 4 778) $vx-mask ($ppc) $vd $vb $vuimm )
660 #.(ppc-opcode vcmpbfp (vxr 4 966 0) $vxr-mask ($ppc) $vd $va $vb )
661 #.(ppc-opcode vcmpbfp. (vxr 4 966 1) $vxr-mask ($ppc) $vd $va $vb )
662 #.(ppc-opcode vcmpeqfp (vxr 4 198 0) $vxr-mask ($ppc) $vd $va $vb )
663 #.(ppc-opcode vcmpeqfp. (vxr 4 198 1) $vxr-mask ($ppc) $vd $va $vb )
664 #.(ppc-opcode vcmpequb (vxr 4 6 0) $vxr-mask ($ppc) $vd $va $vb )
665 #.(ppc-opcode vcmpequb. (vxr 4 6 1) $vxr-mask ($ppc) $vd $va $vb )
666 #.(ppc-opcode vcmpequh (vxr 4 70 0) $vxr-mask ($ppc) $vd $va $vb )
667 #.(ppc-opcode vcmpequh. (vxr 4 70 1) $vxr-mask ($ppc) $vd $va $vb )
668 #.(ppc-opcode vcmpequw (vxr 4 134 0) $vxr-mask ($ppc) $vd $va $vb )
669 #.(ppc-opcode vcmpequw. (vxr 4 134 1) $vxr-mask ($ppc) $vd $va $vb )
670 #.(ppc-opcode vcmpgefp (vxr 4 454 0) $vxr-mask ($ppc) $vd $va $vb )
671 #.(ppc-opcode vcmpgefp. (vxr 4 454 1) $vxr-mask ($ppc) $vd $va $vb )
672 #.(ppc-opcode vcmpgtfp (vxr 4 710 0) $vxr-mask ($ppc) $vd $va $vb )
673 #.(ppc-opcode vcmpgtfp. (vxr 4 710 1) $vxr-mask ($ppc) $vd $va $vb )
674 #.(ppc-opcode vcmpgtsb (vxr 4 774 0) $vxr-mask ($ppc) $vd $va $vb )
675 #.(ppc-opcode vcmpgtsb. (vxr 4 774 1) $vxr-mask ($ppc) $vd $va $vb )
676 #.(ppc-opcode vcmpgtsh (vxr 4 838 0) $vxr-mask ($ppc) $vd $va $vb )
677 #.(ppc-opcode vcmpgtsh. (vxr 4 838 1) $vxr-mask ($ppc) $vd $va $vb )
678 #.(ppc-opcode vcmpgtsw (vxr 4 902 0) $vxr-mask ($ppc) $vd $va $vb )
679 #.(ppc-opcode vcmpgtsw. (vxr 4 902 1) $vxr-mask ($ppc) $vd $va $vb )
680 #.(ppc-opcode vcmpgtub (vxr 4 518 0) $vxr-mask ($ppc) $vd $va $vb )
681 #.(ppc-opcode vcmpgtub. (vxr 4 518 1) $vxr-mask ($ppc) $vd $va $vb )
682 #.(ppc-opcode vcmpgtuh (vxr 4 582 0) $vxr-mask ($ppc) $vd $va $vb )
683 #.(ppc-opcode vcmpgtuh. (vxr 4 582 1) $vxr-mask ($ppc) $vd $va $vb )
684 #.(ppc-opcode vcmpgtuw (vxr 4 646 0) $vxr-mask ($ppc) $vd $va $vb )
685 #.(ppc-opcode vcmpgtuw. (vxr 4 646 1) $vxr-mask ($ppc) $vd $va $vb )
686 #.(ppc-opcode vctsxs (vx 4 970) $vx-mask ($ppc) $vd $vb $vuimm )
687 #.(ppc-opcode vctuxs (vx 4 906) $vx-mask ($ppc) $vd $vb $vuimm )
688 #.(ppc-opcode vexptefp (vx 4 394) $vx-mask ($ppc) $vd $vb )
689 #.(ppc-opcode vlogefp (vx 4 458) $vx-mask ($ppc) $vd $vb )
690 #.(ppc-opcode vmaddfp (vxa 4 46) $vxa-mask ($ppc) $vd $va $vb $vc )
691 #.(ppc-opcode vmaxfp (vx 4 1034) $vx-mask ($ppc) $vd $va $vb )
692 #.(ppc-opcode vmaxsb (vx 4 258) $vx-mask ($ppc) $vd $va $vb )
693 #.(ppc-opcode vmaxsh (vx 4 322) $vx-mask ($ppc) $vd $va $vb )
694 #.(ppc-opcode vmaxsw (vx 4 386) $vx-mask ($ppc) $vd $va $vb )
695 #.(ppc-opcode vmaxub (vx 4 2) $vx-mask ($ppc) $vd $va $vb )
696 #.(ppc-opcode vmaxuh (vx 4 66) $vx-mask ($ppc) $vd $va $vb )
697 #.(ppc-opcode vmaxuw (vx 4 130) $vx-mask ($ppc) $vd $va $vb )
698 #.(ppc-opcode vmhaddshs (vxa 4 32) $vxa-mask ($ppc) $vd $va $vb $vc )
699 #.(ppc-opcode vmhraddshs (vxa 4 33) $vxa-mask ($ppc) $vd $va $vb $vc )
700 #.(ppc-opcode vminfp (vx 4 1098) $vx-mask ($ppc) $vd $va $vb )
701 #.(ppc-opcode vminsb (vx 4 770) $vx-mask ($ppc) $vd $va $vb )
702 #.(ppc-opcode vminsh (vx 4 834) $vx-mask ($ppc) $vd $va $vb )
703 #.(ppc-opcode vminsw (vx 4 898) $vx-mask ($ppc) $vd $va $vb )
704 #.(ppc-opcode vminub (vx 4 514) $vx-mask ($ppc) $vd $va $vb )
705 #.(ppc-opcode vminuh (vx 4 578) $vx-mask ($ppc) $vd $va $vb )
706 #.(ppc-opcode vminuw (vx 4 642) $vx-mask ($ppc) $vd $va $vb )
707 #.(ppc-opcode vmladduhm (vxa 4 34) $vxa-mask ($ppc) $vd $va $vb $vc )
708 #.(ppc-opcode vmrghb (vx 4 12) $vx-mask ($ppc) $vd $va $vb )
709 #.(ppc-opcode vmrghh (vx 4 76) $vx-mask ($ppc) $vd $va $vb )
710 #.(ppc-opcode vmrghw (vx 4 140) $vx-mask ($ppc) $vd $va $vb )
711 #.(ppc-opcode vmrglb (vx 4 268) $vx-mask ($ppc) $vd $va $vb )
712 #.(ppc-opcode vmrglh (vx 4 332) $vx-mask ($ppc) $vd $va $vb )
713 #.(ppc-opcode vmrglw (vx 4 396) $vx-mask ($ppc) $vd $va $vb )
714 #.(ppc-opcode vmsummbm (vxa 4 37) $vxa-mask ($ppc) $vd $va $vb $vc )
715 #.(ppc-opcode vmsumshm (vxa 4 40) $vxa-mask ($ppc) $vd $va $vb $vc )
716 #.(ppc-opcode vmsumshs (vxa 4 41) $vxa-mask ($ppc) $vd $va $vb $vc )
717 #.(ppc-opcode vmsumubm (vxa 4 36) $vxa-mask ($ppc) $vd $va $vb $vc )
718 #.(ppc-opcode vmsumuhm (vxa 4 38) $vxa-mask ($ppc) $vd $va $vb $vc )
719 #.(ppc-opcode vmsumuhs (vxa 4 39) $vxa-mask ($ppc) $vd $va $vb $vc )
720 #.(ppc-opcode vmulesb (vx 4 776) $vx-mask ($ppc) $vd $va $vb )
721 #.(ppc-opcode vmulesh (vx 4 840) $vx-mask ($ppc) $vd $va $vb )
722 #.(ppc-opcode vmuleub (vx 4 520) $vx-mask ($ppc) $vd $va $vb )
723 #.(ppc-opcode vmuleuh (vx 4 584) $vx-mask ($ppc) $vd $va $vb )
724 #.(ppc-opcode vmulosb (vx 4 264) $vx-mask ($ppc) $vd $va $vb )
725 #.(ppc-opcode vmulosh (vx 4 328) $vx-mask ($ppc) $vd $va $vb )
726 #.(ppc-opcode vmuloub (vx 4 8) $vx-mask ($ppc) $vd $va $vb )
727 #.(ppc-opcode vmulouh (vx 4 72) $vx-mask ($ppc) $vd $va $vb )
728 #.(ppc-opcode vnmsubfp (vxa 4 47) $vxa-mask ($ppc) $vd $va $vc $vb )
729 #.(ppc-opcode vnor (vx 4 1284) $vx-mask ($ppc) $vd $va $vb )
730 #.(ppc-opcode vor (vx 4 1156) $vx-mask ($ppc) $vd $va $vb )
731 #.(ppc-opcode vperm (vxa 4 43) $vxa-mask ($ppc) $vd $va $vb $vc )
732 #.(ppc-opcode vpkpx (vx 4 782) $vx-mask ($ppc) $vd $va $vb )
733 #.(ppc-opcode vpkshss (vx 4 398) $vx-mask ($ppc) $vd $va $vb )
734 #.(ppc-opcode vpkshus (vx 4 270) $vx-mask ($ppc) $vd $va $vb )
735 #.(ppc-opcode vpkswss (vx 4 462) $vx-mask ($ppc) $vd $va $vb )
736 #.(ppc-opcode vpkswus (vx 4 334) $vx-mask ($ppc) $vd $va $vb )
737 #.(ppc-opcode vpkuhum (vx 4 14) $vx-mask ($ppc) $vd $va $vb )
738 #.(ppc-opcode vpkuhus (vx 4 142) $vx-mask ($ppc) $vd $va $vb )
739 #.(ppc-opcode vpkuwum (vx 4 78) $vx-mask ($ppc) $vd $va $vb )
740 #.(ppc-opcode vpkuwus (vx 4 206) $vx-mask ($ppc) $vd $va $vb )
741 #.(ppc-opcode vrefp (vx 4 266) $vx-mask ($ppc) $vd $vb )
742 #.(ppc-opcode vrfim (vx 4 714) $vx-mask ($ppc) $vd $vb )
743 #.(ppc-opcode vrfin (vx 4 522) $vx-mask ($ppc) $vd $vb )
744 #.(ppc-opcode vrfip (vx 4 650) $vx-mask ($ppc) $vd $vb )
745 #.(ppc-opcode vrfiz (vx 4 586) $vx-mask ($ppc) $vd $vb )
746 #.(ppc-opcode vrlb (vx 4 4) $vx-mask ($ppc) $vd $va $vb )
747 #.(ppc-opcode vrlh (vx 4 68) $vx-mask ($ppc) $vd $va $vb )
748 #.(ppc-opcode vrlw (vx 4 132) $vx-mask ($ppc) $vd $va $vb )
749 #.(ppc-opcode vrsqrtefp (vx 4 330) $vx-mask ($ppc) $vd $vb )
750 #.(ppc-opcode vsel (vxa 4 42) $vxa-mask ($ppc) $vd $va $vb $vc )
751 #.(ppc-opcode vsl (vx 4 452) $vx-mask ($ppc) $vd $va $vb )
752 #.(ppc-opcode vslb (vx 4 260) $vx-mask ($ppc) $vd $va $vb )
753 #.(ppc-opcode vsldoi (vxa 4 44) $vxa-mask ($ppc) $vd $va $vb $vsh)
754 #.(ppc-opcode vslh (vx 4 324) $vx-mask ($ppc) $vd $va $vb )
755 #.(ppc-opcode vslo (vx 4 1036) $vx-mask ($ppc) $vd $va $vb )
756 #.(ppc-opcode vslw (vx 4 388) $vx-mask ($ppc) $vd $va $vb )
757 #.(ppc-opcode vspltb (vx 4 524) $vx-mask ($ppc) $vd $vb $vuimm )
758 #.(ppc-opcode vsplth (vx 4 588) $vx-mask ($ppc) $vd $vb $vuimm )
759 #.(ppc-opcode vspltisb (vx 4 780) $vx-mask ($ppc) $vd $vsimm )
760 #.(ppc-opcode vspltish (vx 4 844) $vx-mask ($ppc) $vd $vsimm )
761 #.(ppc-opcode vspltisw (vx 4 908) $vx-mask ($ppc) $vd $vsimm )
762 #.(ppc-opcode vspltw (vx 4 652) $vx-mask ($ppc) $vd $vb $vuimm )
763 #.(ppc-opcode vsr (vx 4 708) $vx-mask ($ppc) $vd $va $vb )
764 #.(ppc-opcode vsrab (vx 4 772) $vx-mask ($ppc) $vd $va $vb )
765 #.(ppc-opcode vsrah (vx 4 836) $vx-mask ($ppc) $vd $va $vb )
766 #.(ppc-opcode vsraw (vx 4 900) $vx-mask ($ppc) $vd $va $vb )
767 #.(ppc-opcode vsrb (vx 4 516) $vx-mask ($ppc) $vd $va $vb )
768 #.(ppc-opcode vsrh (vx 4 580) $vx-mask ($ppc) $vd $va $vb )
769 #.(ppc-opcode vsro (vx 4 1100) $vx-mask ($ppc) $vd $va $vb )
770 #.(ppc-opcode vsrw (vx 4 644) $vx-mask ($ppc) $vd $va $vb )
771 #.(ppc-opcode vsubcuw (vx 4 1408) $vx-mask ($ppc) $vd $va $vb )
772 #.(ppc-opcode vsubfp (vx 4 74) $vx-mask ($ppc) $vd $va $vb )
773 #.(ppc-opcode vsubsbs (vx 4 1792) $vx-mask ($ppc) $vd $va $vb )
774 #.(ppc-opcode vsubshs (vx 4 1856) $vx-mask ($ppc) $vd $va $vb )
775 #.(ppc-opcode vsubsws (vx 4 1920) $vx-mask ($ppc) $vd $va $vb )
776 #.(ppc-opcode vsububm (vx 4 1024) $vx-mask ($ppc) $vd $va $vb )
777 #.(ppc-opcode vsububs (vx 4 1536) $vx-mask ($ppc) $vd $va $vb )
778 #.(ppc-opcode vsubuhm (vx 4 1088) $vx-mask ($ppc) $vd $va $vb )
779 #.(ppc-opcode vsubuhs (vx 4 1600) $vx-mask ($ppc) $vd $va $vb )
780 #.(ppc-opcode vsubuwm (vx 4 1152) $vx-mask ($ppc) $vd $va $vb )
781 #.(ppc-opcode vsubuws (vx 4 1664) $vx-mask ($ppc) $vd $va $vb )
782 #.(ppc-opcode vsumsws (vx 4 1928) $vx-mask ($ppc) $vd $va $vb )
783 #.(ppc-opcode vsum2sws (vx 4 1672) $vx-mask ($ppc) $vd $va $vb )
784 #.(ppc-opcode vsum4sbs (vx 4 1800) $vx-mask ($ppc) $vd $va $vb )
785 #.(ppc-opcode vsum4shs (vx 4 1608) $vx-mask ($ppc) $vd $va $vb )
786 #.(ppc-opcode vsum4ubs (vx 4 1544) $vx-mask ($ppc) $vd $va $vb )
787 #.(ppc-opcode vupkhpx (vx 4 846) $vx-mask ($ppc) $vd $vb )
788 #.(ppc-opcode vupkhsb (vx 4 526) $vx-mask ($ppc) $vd $vb )
789 #.(ppc-opcode vupkhsh (vx 4 590) $vx-mask ($ppc) $vd $vb )
790 #.(ppc-opcode vupklpx (vx 4 974) $vx-mask ($ppc) $vd $vb )
791 #.(ppc-opcode vupklsb (vx 4 654) $vx-mask ($ppc) $vd $vb )
792 #.(ppc-opcode vupklsh (vx 4 718) $vx-mask ($ppc) $vd $vb )
793 #.(ppc-opcode vxor (vx 4 1220) $vx-mask ($ppc) $vd $va $vb )
794
795 #.(ppc-opcode mulli (op 7) $op-mask ($ppc) $rt $ra $si)
796
797 #.(ppc-opcode subfic (op 8) $op-mask ($ppc) $rt $ra $si)
798
799 #.(ppc-opcode cmplwi (opl 10 0) $opl-mask ($ppc) $obf $ra $ui)
800
801 #.(ppc-opcode cmpldi (opl 10 1) $opl-mask ($ppc $b64) $obf $ra $ui)
802
803 #.(ppc-opcode cmpli (op 10) $op-mask ($ppc) $bf $l $ra $ui)
804
805 #.(ppc-opcode cmpwi (opl 11 0) $opl-mask ($ppc) $obf $ra $si)
806
807 #.(ppc-opcode cmpdi (opl 11 1) $opl-mask ($ppc $b64) $obf $ra $si)
808
809 #.(ppc-opcode cmpi (op 11) $op-mask ($ppc) $bf $l $ra $si)
810
811 #.(ppc-opcode addic (op 12) $op-mask ($ppc) $rt $ra $si)
812 #.(ppc-opcode subic (op 12) $op-mask ($ppc) $rt $ra $nsi)
813
814 #.(ppc-opcode addic. (op 13) $op-mask ($ppc) $rt $ra $si)
815 #.(ppc-opcode subic. (op 13) $op-mask ($ppc) $rt $ra $nsi)
816
817 #.(ppc-opcode li (op 14) $dra-mask ($ppc) $rt $si)
818 #.(ppc-opcode addi (op 14) $op-mask ($ppc) $rt $ra $si)
819 #.(ppc-opcode subi (op 14) $op-mask ($ppc) $rt $ra $nsi)
820 #.(ppc-opcode la (op 14) $op-mask ($ppc) $rt $d $ra)
821
822 #.(ppc-opcode lis (op 15) $dra-mask ($ppc) $rt $sisignopt)
823 #.(ppc-opcode addis (op 15) $op-mask ($ppc) $rt $ra $sisignopt)
824 #.(ppc-opcode subis (op 15) $op-mask ($ppc) $rt $ra $nsi)
825
826 #.(ppc-opcode bdnz- (bbo 16 $bodnz 0 0) $bboybi-mask ($ppc) $bdm)
827 #.(ppc-opcode bdnz+ (bbo 16 $bodnz 0 0) $bboybi-mask ($ppc) $bdp)
828 #.(ppc-opcode bdnz (bbo 16 $bodnz 0 0) $bboybi-mask ($ppc) $bd)
829 #.(ppc-opcode bdnzl- (bbo 16 $bodnz 0 1) $bboybi-mask ($ppc) $bdm)
830 #.(ppc-opcode bdnzl+ (bbo 16 $bodnz 0 1) $bboybi-mask ($ppc) $bdp)
831 #.(ppc-opcode bdnzl (bbo 16 $bodnz 0 1) $bboybi-mask ($ppc) $bd)
832 #.(ppc-opcode bdnza- (bbo 16 $bodnz 1 0) $bboybi-mask ($ppc) $bdma)
833 #.(ppc-opcode bdnza+ (bbo 16 $bodnz 1 0) $bboybi-mask ($ppc) $bdpa)
834 #.(ppc-opcode bdnza (bbo 16 $bodnz 1 0) $bboybi-mask ($ppc) $bda)
835 #.(ppc-opcode bdnzla- (bbo 16 $bodnz 1 1) $bboybi-mask ($ppc) $bdma)
836 #.(ppc-opcode bdnzla+ (bbo 16 $bodnz 1 1) $bboybi-mask ($ppc) $bdpa)
837 #.(ppc-opcode bdnzla (bbo 16 $bodnz 1 1) $bboybi-mask ($ppc) $bda)
838 #.(ppc-opcode bdz- (bbo 16 $bodz 0 0) $bboybi-mask ($ppc) $bdm)
839 #.(ppc-opcode bdz+ (bbo 16 $bodz 0 0) $bboybi-mask ($ppc) $bdp)
840 #.(ppc-opcode bdz (bbo 16 $bodz 0 0) $bboybi-mask ($ppc) $bd)
841 #.(ppc-opcode bdzl- (bbo 16 $bodz 0 1) $bboybi-mask ($ppc) $bdm)
842 #.(ppc-opcode bdzl+ (bbo 16 $bodz 0 1) $bboybi-mask ($ppc) $bdp)
843 #.(ppc-opcode bdzl (bbo 16 $bodz 0 1) $bboybi-mask ($ppc) $bd)
844 #.(ppc-opcode bdza- (bbo 16 $bodz 1 0) $bboybi-mask ($ppc) $bdma)
845 #.(ppc-opcode bdza+ (bbo 16 $bodz 1 0) $bboybi-mask ($ppc) $bdpa)
846 #.(ppc-opcode bdza (bbo 16 $bodz 1 0) $bboybi-mask ($ppc) $bda)
847 #.(ppc-opcode bdzla- (bbo 16 $bodz 1 1) $bboybi-mask ($ppc) $bdma)
848 #.(ppc-opcode bdzla+ (bbo 16 $bodz 1 1) $bboybi-mask ($ppc) $bdpa)
849 #.(ppc-opcode bdzla (bbo 16 $bodz 1 1) $bboybi-mask ($ppc) $bda)
850 #.(ppc-opcode blt- (bbocb 16 $bot $cblt 0 0) $bboycb-mask ($ppc) $cr $bdm)
851 #.(ppc-opcode blt+ (bbocb 16 $bot $cblt 0 0) $bboycb-mask ($ppc) $cr $bdp)
852 #.(ppc-opcode blt (bbocb 16 $bot $cblt 0 0) $bboycb-mask ($ppc) $cr $bd)
853 #.(ppc-opcode bltl- (bbocb 16 $bot $cblt 0 1) $bboycb-mask ($ppc) $cr $bdm)
854 #.(ppc-opcode bltl+ (bbocb 16 $bot $cblt 0 1) $bboycb-mask ($ppc) $cr $bdp)
855 #.(ppc-opcode bltl (bbocb 16 $bot $cblt 0 1) $bboycb-mask ($ppc) $cr $bd)
856 #.(ppc-opcode blta- (bbocb 16 $bot $cblt 1 0) $bboycb-mask ($ppc) $cr $bdma)
857 #.(ppc-opcode blta+ (bbocb 16 $bot $cblt 1 0) $bboycb-mask ($ppc) $cr $bdpa)
858 #.(ppc-opcode blta (bbocb 16 $bot $cblt 1 0) $bboycb-mask ($ppc) $cr $bda)
859 #.(ppc-opcode bltla- (bbocb 16 $bot $cblt 1 1) $bboycb-mask ($ppc) $cr $bdma)
860 #.(ppc-opcode bltla+ (bbocb 16 $bot $cblt 1 1) $bboycb-mask ($ppc) $cr $bdpa)
861 #.(ppc-opcode bltla (bbocb 16 $bot $cblt 1 1) $bboycb-mask ($ppc) $cr $bda)
862 #.(ppc-opcode bgt- (bbocb 16 $bot $cbgt 0 0) $bboycb-mask ($ppc) $cr $bdm)
863 #.(ppc-opcode bgt+ (bbocb 16 $bot $cbgt 0 0) $bboycb-mask ($ppc) $cr $bdp)
864 #.(ppc-opcode bgt (bbocb 16 $bot $cbgt 0 0) $bboycb-mask ($ppc) $cr $bd)
865 #.(ppc-opcode bgtl- (bbocb 16 $bot $cbgt 0 1) $bboycb-mask ($ppc) $cr $bdm)
866 #.(ppc-opcode bgtl+ (bbocb 16 $bot $cbgt 0 1) $bboycb-mask ($ppc) $cr $bdp)
867 #.(ppc-opcode bgtl (bbocb 16 $bot $cbgt 0 1) $bboycb-mask ($ppc) $cr $bd)
868 #.(ppc-opcode bgta- (bbocb 16 $bot $cbgt 1 0) $bboycb-mask ($ppc) $cr $bdma)
869 #.(ppc-opcode bgta+ (bbocb 16 $bot $cbgt 1 0) $bboycb-mask ($ppc) $cr $bdpa)
870 #.(ppc-opcode bgta (bbocb 16 $bot $cbgt 1 0) $bboycb-mask ($ppc) $cr $bda)
871 #.(ppc-opcode bgtla- (bbocb 16 $bot $cbgt 1 1) $bboycb-mask ($ppc) $cr $bdma)
872 #.(ppc-opcode bgtla+ (bbocb 16 $bot $cbgt 1 1) $bboycb-mask ($ppc) $cr $bdpa)
873 #.(ppc-opcode bgtla (bbocb 16 $bot $cbgt 1 1) $bboycb-mask ($ppc) $cr $bda)
874 #.(ppc-opcode beq- (bbocb 16 $bot $cbeq 0 0) $bboycb-mask ($ppc) $cr $bdm)
875 #.(ppc-opcode beq+ (bbocb 16 $bot $cbeq 0 0) $bboycb-mask ($ppc) $cr $bdp)
876 #.(ppc-opcode beq (bbocb 16 $bot $cbeq 0 0) $bboycb-mask ($ppc) $cr $bd)
877 #.(ppc-opcode beql- (bbocb 16 $bot $cbeq 0 1) $bboycb-mask ($ppc) $cr $bdm)
878 #.(ppc-opcode beql+ (bbocb 16 $bot $cbeq 0 1) $bboycb-mask ($ppc) $cr $bdp)
879 #.(ppc-opcode beql (bbocb 16 $bot $cbeq 0 1) $bboycb-mask ($ppc) $cr $bd)
880 #.(ppc-opcode beqa- (bbocb 16 $bot $cbeq 1 0) $bboycb-mask ($ppc) $cr $bdma)
881 #.(ppc-opcode beqa+ (bbocb 16 $bot $cbeq 1 0) $bboycb-mask ($ppc) $cr $bdpa)
882 #.(ppc-opcode beqa (bbocb 16 $bot $cbeq 1 0) $bboycb-mask ($ppc) $cr $bda)
883 #.(ppc-opcode beqla- (bbocb 16 $bot $cbeq 1 1) $bboycb-mask ($ppc) $cr $bdma)
884 #.(ppc-opcode beqla+ (bbocb 16 $bot $cbeq 1 1) $bboycb-mask ($ppc) $cr $bdpa)
885 #.(ppc-opcode beqla (bbocb 16 $bot $cbeq 1 1) $bboycb-mask ($ppc) $cr $bda)
886 #.(ppc-opcode bso- (bbocb 16 $bot $cbso 0 0) $bboycb-mask ($ppc) $cr $bdm)
887 #.(ppc-opcode bso+ (bbocb 16 $bot $cbso 0 0) $bboycb-mask ($ppc) $cr $bdp)
888 #.(ppc-opcode bso (bbocb 16 $bot $cbso 0 0) $bboycb-mask ($ppc) $cr $bd)
889 #.(ppc-opcode bsol- (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bdm)
890 #.(ppc-opcode bsol+ (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bdp)
891 #.(ppc-opcode bsol (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bd)
892 #.(ppc-opcode bsoa- (bbocb 16 $bot $cbso 1 0) $bboycb-mask ($ppc) $cr $bdma)
893 #.(ppc-opcode bsoa+ (bbocb 16 $bot $cbso 1 0) $bboycb-mask ($ppc) $cr $bdpa)
894 #.(ppc-opcode bsoa (bbocb 16 $bot $cbso 1 0) $bboycb-mask ($ppc) $cr $bda)
895 #.(ppc-opcode bsola- (bbocb 16 $bot $cbso 1 1) $bboycb-mask ($ppc) $cr $bdma)
896 #.(ppc-opcode bsola+ (bbocb 16 $bot $cbso 1 1) $bboycb-mask ($ppc) $cr $bdpa)
897 #.(ppc-opcode bsola (bbocb 16 $bot $cbso 1 1) $bboycb-mask ($ppc) $cr $bda)
898 #.(ppc-opcode bun- (bbocb 16 $bot $cbso 0 0) $bboycb-mask ($ppc) $cr $bdm)
899 #.(ppc-opcode bun+ (bbocb 16 $bot $cbso 0 0) $bboycb-mask ($ppc) $cr $bdp)
900 #.(ppc-opcode bun (bbocb 16 $bot $cbso 0 0) $bboycb-mask ($ppc) $cr $bd)
901 #.(ppc-opcode bunl- (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bdm)
902 #.(ppc-opcode bunl+ (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bdp)
903 #.(ppc-opcode bunl (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bd)
904 #.(ppc-opcode buna- (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bdma)
905 #.(ppc-opcode buna+ (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bdpa)
906 #.(ppc-opcode buna (bbocb 16 $bot $cbso 0 1) $bboycb-mask ($ppc) $cr $bda)
907 #.(ppc-opcode bunla- (bbocb 16 $bot $cbso 1 1) $bboycb-mask ($ppc) $cr $bdma)
908 #.(ppc-opcode bunla+ (bbocb 16 $bot $cbso 1 1) $bboycb-mask ($ppc) $cr $bdpa)
909 #.(ppc-opcode bunla (bbocb 16 $bot $cbso 1 1) $bboycb-mask ($ppc) $cr $bda)
910 #.(ppc-opcode bge- (bbocb 16 $bof $cblt 0 0) $bboycb-mask ($ppc) $cr $bdm)
911 #.(ppc-opcode bge+ (bbocb 16 $bof $cblt 0 0) $bboycb-mask ($ppc) $cr $bdp)
912 #.(ppc-opcode bge (bbocb 16 $bof $cblt 0 0) $bboycb-mask ($ppc) $cr $bd)
913 #.(ppc-opcode bgel- (bbocb 16 $bof $cblt 0 1) $bboycb-mask ($ppc) $cr $bdm)
914 #.(ppc-opcode bgel+ (bbocb 16 $bof $cblt 0 1) $bboycb-mask ($ppc) $cr $bdp)
915 #.(ppc-opcode bgel (bbocb 16 $bof $cblt 0 1) $bboycb-mask ($ppc) $cr $bd)
916 #.(ppc-opcode bgea- (bbocb 16 $bof $cblt 1 0) $bboycb-mask ($ppc) $cr $bdma)
917 #.(ppc-opcode bgea+ (bbocb 16 $bof $cblt 1 0) $bboycb-mask ($ppc) $cr $bdpa)
918 #.(ppc-opcode bgea (bbocb 16 $bof $cblt 1 0) $bboycb-mask ($ppc) $cr $bda)
919 #.(ppc-opcode bgela- (bbocb 16 $bof $cblt 1 1) $bboycb-mask ($ppc) $cr $bdma)
920 #.(ppc-opcode bgela+ (bbocb 16 $bof $cblt 1 1) $bboycb-mask ($ppc) $cr $bdpa)
921 #.(ppc-opcode bgela (bbocb 16 $bof $cblt 1 1) $bboycb-mask ($ppc) $cr $bda)
922 #.(ppc-opcode bnl- (bbocb 16 $bof $cblt 0 0) $bboycb-mask ($ppc) $cr $bdm)
923 #.(ppc-opcode bnl+ (bbocb 16 $bof $cblt 0 0) $bboycb-mask ($ppc) $cr $bdp)
924 #.(ppc-opcode bnl (bbocb 16 $bof $cblt 0 0) $bboycb-mask ($ppc) $cr $bd)
925 #.(ppc-opcode bnll- (bbocb 16 $bof $cblt 0 1) $bboycb-mask ($ppc) $cr $bdm)
926 #.(ppc-opcode bnll+ (bbocb 16 $bof $cblt 0 1) $bboycb-mask ($ppc) $cr $bdp)
927 #.(ppc-opcode bnll (bbocb 16 $bof $cblt 0 1) $bboycb-mask ($ppc) $cr $bd)
928 #.(ppc-opcode bnla- (bbocb 16 $bof $cblt 1 0) $bboycb-mask ($ppc) $cr $bdma)
929 #.(ppc-opcode bnla+ (bbocb 16 $bof $cblt 1 0) $bboycb-mask ($ppc) $cr $bdpa)
930 #.(ppc-opcode bnla (bbocb 16 $bof $cblt 1 0) $bboycb-mask ($ppc) $cr $bda)
931 #.(ppc-opcode bnlla- (bbocb 16 $bof $cblt 1 1) $bboycb-mask ($ppc) $cr $bdma)
932 #.(ppc-opcode bnlla+ (bbocb 16 $bof $cblt 1 1) $bboycb-mask ($ppc) $cr $bdpa)
933 #.(ppc-opcode bnlla (bbocb 16 $bof $cblt 1 1) $bboycb-mask ($ppc) $cr $bda)
934 #.(ppc-opcode ble- (bbocb 16 $bof $cbgt 0 0) $bboycb-mask ($ppc) $cr $bdm)
935 #.(ppc-opcode ble+ (bbocb 16 $bof $cbgt 0 0) $bboycb-mask ($ppc) $cr $bdp)
936 #.(ppc-opcode ble (bbocb 16 $bof $cbgt 0 0) $bboycb-mask ($ppc) $cr $bd)
937 #.(ppc-opcode blel- (bbocb 16 $bof $cbgt 0 1) $bboycb-mask ($ppc) $cr $bdm)
938 #.(ppc-opcode blel+ (bbocb 16 $bof $cbgt 0 1) $bboycb-mask ($ppc) $cr $bdp)
939 #.(ppc-opcode blel (bbocb 16 $bof $cbgt 0 1) $bboycb-mask ($ppc) $cr $bd)
940 #.(ppc-opcode blea- (bbocb 16 $bof $cbgt 1 0) $bboycb-mask ($ppc) $cr $bdma)
941 #.(ppc-opcode blea+ (bbocb 16 $bof $cbgt 1 0) $bboycb-mask ($ppc) $cr $bdpa)
942 #.(ppc-opcode blea (bbocb 16 $bof $cbgt 1 0) $bboycb-mask ($ppc) $cr $bda)
943 #.(ppc-opcode blela- (bbocb 16 $bof $cbgt 1 1) $bboycb-mask ($ppc) $cr $bdma)
944 #.(ppc-opcode blela+ (bbocb 16 $bof $cbgt 1 1) $bboycb-mask ($ppc) $cr $bdpa)
945 #.(ppc-opcode blela (bbocb 16 $bof $cbgt 1 1) $bboycb-mask ($ppc) $cr $bda)
946 #.(ppc-opcode bng- (bbocb 16 $bof $cbgt 0 0) $bboycb-mask ($ppc) $cr $bdm)
947 #.(ppc-opcode bng+ (bbocb 16 $bof $cbgt 0 0) $bboycb-mask ($ppc) $cr $bdp)
948 #.(ppc-opcode bng (bbocb 16 $bof $cbgt 0 0) $bboycb-mask ($ppc) $cr $bd)
949 #.(ppc-opcode bngl- (bbocb 16 $bof $cbgt 0 1) $bboycb-mask ($ppc) $cr $bdm)
950 #.(ppc-opcode bngl+ (bbocb 16 $bof $cbgt 0 1) $bboycb-mask ($ppc) $cr $bdp)
951 #.(ppc-opcode bngl (bbocb 16 $bof $cbgt 0 1) $bboycb-mask ($ppc) $cr $bd)
952 #.(ppc-opcode bnga- (bbocb 16 $bof $cbgt 1 0) $bboycb-mask ($ppc) $cr $bdma)
953 #.(ppc-opcode bnga+ (bbocb 16 $bof $cbgt 1 0) $bboycb-mask ($ppc) $cr $bdpa)
954 #.(ppc-opcode bnga (bbocb 16 $bof $cbgt 1 0) $bboycb-mask ($ppc) $cr $bda)
955 #.(ppc-opcode bngla- (bbocb 16 $bof $cbgt 1 1) $bboycb-mask ($ppc) $cr $bdma)
956 #.(ppc-opcode bngla+ (bbocb 16 $bof $cbgt 1 1) $bboycb-mask ($ppc) $cr $bdpa)
957 #.(ppc-opcode bngla (bbocb 16 $bof $cbgt 1 1) $bboycb-mask ($ppc) $cr $bda)
958 #.(ppc-opcode bne- (bbocb 16 $bof $cbeq 0 0) $bboycb-mask ($ppc) $cr $bdm)
959 #.(ppc-opcode bne+ (bbocb 16 $bof $cbeq 0 0) $bboycb-mask ($ppc) $cr $bdp)
960 #.(ppc-opcode bne (bbocb 16 $bof $cbeq 0 0) $bboycb-mask ($ppc) $cr $bd)
961 #.(ppc-opcode bnel- (bbocb 16 $bof $cbeq 0 1) $bboycb-mask ($ppc) $cr $bdm)
962 #.(ppc-opcode bnel+ (bbocb 16 $bof $cbeq 0 1) $bboycb-mask ($ppc) $cr $bdp)
963 #.(ppc-opcode bnel (bbocb 16 $bof $cbeq 0 1) $bboycb-mask ($ppc) $cr $bd)
964 #.(ppc-opcode bnea- (bbocb 16 $bof $cbeq 1 0) $bboycb-mask ($ppc) $cr $bdma)
965 #.(ppc-opcode bnea+ (bbocb 16 $bof $cbeq 1 0) $bboycb-mask ($ppc) $cr $bdpa)
966 #.(ppc-opcode bnea (bbocb 16 $bof $cbeq 1 0) $bboycb-mask ($ppc) $cr $bda)
967 #.(ppc-opcode bnela- (bbocb 16 $bof $cbeq 1 1) $bboycb-mask ($ppc) $cr $bdma)
968 #.(ppc-opcode bnela+ (bbocb 16 $bof $cbeq 1 1) $bboycb-mask ($ppc) $cr $bdpa)
969 #.(ppc-opcode bnela (bbocb 16 $bof $cbeq 1 1) $bboycb-mask ($ppc) $cr $bda)
970 #.(ppc-opcode bns- (bbocb 16 $bof $cbso 0 0) $bboycb-mask ($ppc) $cr $bdm)
971 #.(ppc-opcode bns+ (bbocb 16 $bof $cbso 0 0) $bboycb-mask ($ppc) $cr $bdp)
972 #.(ppc-opcode bns (bbocb 16 $bof $cbso 0 0) $bboycb-mask ($ppc) $cr $bd)
973 #.(ppc-opcode bnsl- (bbocb 16 $bof $cbso 0 1) $bboycb-mask ($ppc) $cr $bdm)
974 #.(ppc-opcode bnsl+ (bbocb 16 $bof $cbso 0 1) $bboycb-mask ($ppc) $cr $bdp)
975 #.(ppc-opcode bnsl (bbocb 16 $bof $cbso 0 1) $bboycb-mask ($ppc) $cr $bd)
976 #.(ppc-opcode bnsa- (bbocb 16 $bof $cbso 1 0) $bboycb-mask ($ppc) $cr $bdma)
977 #.(ppc-opcode bnsa+ (bbocb 16 $bof $cbso 1 0) $bboycb-mask ($ppc) $cr $bdpa)
978 #.(ppc-opcode bnsa (bbocb 16 $bof $cbso 1 0) $bboycb-mask ($ppc) $cr $bda)
979 #.(ppc-opcode bnsla- (bbocb 16 $bof $cbso 1 1) $bboycb-mask ($ppc) $cr $bdma)
980 #.(ppc-opcode bnsla+ (bbocb 16 $bof $cbso 1 1) $bboycb-mask ($ppc) $cr $bdpa)
981 #.(ppc-opcode bnsla (bbocb 16 $bof $cbso 1 1) $bboycb-mask ($ppc) $cr $bda)
982 #.(ppc-opcode bnu- (bbocb 16 $bof $cbso 0 0) $bboycb-mask ($ppc) $cr $bdm)
983 #.(ppc-opcode bnu+ (bbocb 16 $bof $cbso 0 0) $bboycb-mask ($ppc) $cr $bdp)
984 #.(ppc-opcode bnu (bbocb 16 $bof $cbso 0 0) $bboycb-mask ($ppc) $cr $bd)
985 #.(ppc-opcode bnul- (bbocb 16 $bof $cbso 0 1) $bboycb-mask ($ppc) $cr $bdm)
986 #.(ppc-opcode bnul+ (bbocb 16 $bof $cbso 0 1) $bboycb-mask ($ppc) $cr $bdp)
987 #.(ppc-opcode bnul (bbocb 16 $bof $cbso 0 1) $bboycb-mask ($ppc) $cr $bd)
988 #.(ppc-opcode bnua- (bbocb 16 $bof $cbso 1 0) $bboycb-mask ($ppc) $cr $bdma)
989 #.(ppc-opcode bnua+ (bbocb 16 $bof $cbso 1 0) $bboycb-mask ($ppc) $cr $bdpa)
990 #.(ppc-opcode bnua (bbocb 16 $bof $cbso 1 0) $bboycb-mask ($ppc) $cr $bda)
991 #.(ppc-opcode bnula- (bbocb 16 $bof $cbso 1 1) $bboycb-mask ($ppc) $cr $bdma)
992 #.(ppc-opcode bnula+ (bbocb 16 $bof $cbso 1 1) $bboycb-mask ($ppc) $cr $bdpa)
993 #.(ppc-opcode bnula (bbocb 16 $bof $cbso 1 1) $bboycb-mask ($ppc) $cr $bda)
994 #.(ppc-opcode bdnzt- (bbo 16 $bodnzt 0 0) $bboy-mask ($ppc) $bi $bdm)
995 #.(ppc-opcode bdnzt+ (bbo 16 $bodnzt 0 0) $bboy-mask ($ppc) $bi $bdp)
996 #.(ppc-opcode bdnzt (bbo 16 $bodnzt 0 0) $bboy-mask ($ppc) $bi $bd)
997 #.(ppc-opcode bdnztl- (bbo 16 $bodnzt 0 1) $bboy-mask ($ppc) $bi $bdm)
998 #.(ppc-opcode bdnztl+ (bbo 16 $bodnzt 0 1) $bboy-mask ($ppc) $bi $bdp)
999 #.(ppc-opcode bdnztl (bbo 16 $bodnzt 0 1) $bboy-mask ($ppc) $bi $bd)
1000 #.(ppc-opcode bdnzta- (bbo 16 $bodnzt 1 0) $bboy-mask ($ppc) $bi $bdma)
1001 #.(ppc-opcode bdnzta+ (bbo 16 $bodnzt 1 0) $bboy-mask ($ppc) $bi $bdpa)
1002 #.(ppc-opcode bdnzta (bbo 16 $bodnzt 1 0) $bboy-mask ($ppc) $bi $bda)
1003 #.(ppc-opcode bdnztla- (bbo 16 $bodnzt 1 1) $bboy-mask ($ppc) $bi $bdma)
1004 #.(ppc-opcode bdnztla+ (bbo 16 $bodnzt 1 1) $bboy-mask ($ppc) $bi $bdpa)
1005 #.(ppc-opcode bdnztla (bbo 16 $bodnzt 1 1) $bboy-mask ($ppc) $bi $bda)
1006 #.(ppc-opcode bdnzf- (bbo 16 $bodnzf 0 0) $bboy-mask ($ppc) $bi $bdm)
1007 #.(ppc-opcode bdnzf+ (bbo 16 $bodnzf 0 0) $bboy-mask ($ppc) $bi $bdp)
1008 #.(ppc-opcode bdnzf (bbo 16 $bodnzf 0 0) $bboy-mask ($ppc) $bi $bd)
1009 #.(ppc-opcode bdnzfl- (bbo 16 $bodnzf 0 1) $bboy-mask ($ppc) $bi $bdm)
1010 #.(ppc-opcode bdnzfl+ (bbo 16 $bodnzf 0 1) $bboy-mask ($ppc) $bi $bdp)
1011 #.(ppc-opcode bdnzfl (bbo 16 $bodnzf 0 1) $bboy-mask ($ppc) $bi $bd)
1012 #.(ppc-opcode bdnzfa- (bbo 16 $bodnzf 1 0) $bboy-mask ($ppc) $bi $bdma)
1013 #.(ppc-opcode bdnzfa+ (bbo 16 $bodnzf 1 0) $bboy-mask ($ppc) $bi $bdpa)
1014 #.(ppc-opcode bdnzfa (bbo 16 $bodnzf 1 0) $bboy-mask ($ppc) $bi $bda)
1015 #.(ppc-opcode bdnzfla- (bbo 16 $bodnzf 1 1) $bboy-mask ($ppc) $bi $bdma)
1016 #.(ppc-opcode bdnzfla+ (bbo 16 $bodnzf 1 1) $bboy-mask ($ppc) $bi $bdpa)
1017 #.(ppc-opcode bdnzfla (bbo 16 $bodnzf 1 1) $bboy-mask ($ppc) $bi $bda)
1018 #.(ppc-opcode bt- (bbo 16 $bot 0 0) $bboy-mask ($ppc) $bi $bdm)
1019 #.(ppc-opcode bt+ (bbo 16 $bot 0 0) $bboy-mask ($ppc) $bi $bdp)
1020 #.(ppc-opcode bt (bbo 16 $bot 0 0) $bboy-mask ($ppc) $bi $bd)
1021 #.(ppc-opcode btl- (bbo 16 $bot 0 1) $bboy-mask ($ppc) $bi $bdm)
1022 #.(ppc-opcode btl+ (bbo 16 $bot 0 1) $bboy-mask ($ppc) $bi $bdp)
1023 #.(ppc-opcode btl (bbo 16 $bot 0 1) $bboy-mask ($ppc) $bi $bd)
1024 #.(ppc-opcode bta- (bbo 16 $bot 1 0) $bboy-mask ($ppc) $bi $bdma)
1025 #.(ppc-opcode bta+ (bbo 16 $bot 1 0) $bboy-mask ($ppc) $bi $bdpa)
1026 #.(ppc-opcode bta (bbo 16 $bot 1 0) $bboy-mask ($ppc) $bi $bda)
1027 #.(ppc-opcode btla- (bbo 16 $bot 1 1) $bboy-mask ($ppc) $bi $bdma)
1028 #.(ppc-opcode btla+ (bbo 16 $bot 1 1) $bboy-mask ($ppc) $bi $bdpa)
1029 #.(ppc-opcode btla (bbo 16 $bot 1 1) $bboy-mask ($ppc) $bi $bda)
1030 #.(ppc-opcode bf- (bbo 16 $bof 0 0) $bboy-mask ($ppc) $bi $bdm)
1031 #.(ppc-opcode bf+ (bbo 16 $bof 0 0) $bboy-mask ($ppc) $bi $bdp)
1032 #.(ppc-opcode bf (bbo 16 $bof 0 0) $bboy-mask ($ppc) $bi $bd)
1033 #.(ppc-opcode bfl- (bbo 16 $bof 0 1) $bboy-mask ($ppc) $bi $bdm)
1034 #.(ppc-opcode bfl+ (bbo 16 $bof 0 1) $bboy-mask ($ppc) $bi $bdp)
1035 #.(ppc-opcode bfl (bbo 16 $bof 0 1) $bboy-mask ($ppc) $bi $bd)
1036 #.(ppc-opcode bfa- (bbo 16 $bof 1 0) $bboy-mask ($ppc) $bi $bdma)
1037 #.(ppc-opcode bfa+ (bbo 16 $bof 1 0) $bboy-mask ($ppc) $bi $bdpa)
1038 #.(ppc-opcode bfa (bbo 16 $bof 1 0) $bboy-mask ($ppc) $bi $bda)
1039 #.(ppc-opcode bfla- (bbo 16 $bof 1 1) $bboy-mask ($ppc) $bi $bdma)
1040 #.(ppc-opcode bfla+ (bbo 16 $bof 1 1) $bboy-mask ($ppc) $bi $bdpa)
1041 #.(ppc-opcode bfla (bbo 16 $bof 1 1) $bboy-mask ($ppc) $bi $bda)
1042 #.(ppc-opcode bdzt- (bbo 16 $bodzt 0 0) $bboy-mask ($ppc) $bi $bdm)
1043 #.(ppc-opcode bdzt+ (bbo 16 $bodzt 0 0) $bboy-mask ($ppc) $bi $bdp)
1044 #.(ppc-opcode bdzt (bbo 16 $bodzt 0 0) $bboy-mask ($ppc) $bi $bd)
1045 #.(ppc-opcode bdztl- (bbo 16 $bodzt 0 1) $bboy-mask ($ppc) $bi $bdm)
1046 #.(ppc-opcode bdztl+ (bbo 16 $bodzt 0 1) $bboy-mask ($ppc) $bi $bdp)
1047 #.(ppc-opcode bdztl (bbo 16 $bodzt 0 1) $bboy-mask ($ppc) $bi $bd)
1048 #.(ppc-opcode bdzta- (bbo 16 $bodzt 1 0) $bboy-mask ($ppc) $bi $bdma)
1049 #.(ppc-opcode bdzta+ (bbo 16 $bodzt 1 0) $bboy-mask ($ppc) $bi $bdpa)
1050 #.(ppc-opcode bdzta (bbo 16 $bodzt 1 0) $bboy-mask ($ppc) $bi $bda)
1051 #.(ppc-opcode bdztla- (bbo 16 $bodzt 1 1) $bboy-mask ($ppc) $bi $bdma)
1052 #.(ppc-opcode bdztla+ (bbo 16 $bodzt 1 1) $bboy-mask ($ppc) $bi $bdpa)
1053 #.(ppc-opcode bdztla (bbo 16 $bodzt 1 1) $bboy-mask ($ppc) $bi $bda)
1054 #.(ppc-opcode bdzf- (bbo 16 $bodzf 0 0) $bboy-mask ($ppc) $bi $bdm)
1055 #.(ppc-opcode bdzf+ (bbo 16 $bodzf 0 0) $bboy-mask ($ppc) $bi $bdp)
1056 #.(ppc-opcode bdzf (bbo 16 $bodzf 0 0) $bboy-mask ($ppc) $bi $bd)
1057 #.(ppc-opcode bdzfl- (bbo 16 $bodzf 0 1) $bboy-mask ($ppc) $bi $bdm)
1058 #.(ppc-opcode bdzfl+ (bbo 16 $bodzf 0 1) $bboy-mask ($ppc) $bi $bdp)
1059 #.(ppc-opcode bdzfl (bbo 16 $bodzf 0 1) $bboy-mask ($ppc) $bi $bd)
1060 #.(ppc-opcode bdzfa- (bbo 16 $bodzf 1 0) $bboy-mask ($ppc) $bi $bdma)
1061 #.(ppc-opcode bdzfa+ (bbo 16 $bodzf 1 0) $bboy-mask ($ppc) $bi $bdpa)
1062 #.(ppc-opcode bdzfa (bbo 16 $bodzf 1 0) $bboy-mask ($ppc) $bi $bda)
1063 #.(ppc-opcode bdzfla- (bbo 16 $bodzf 1 1) $bboy-mask ($ppc) $bi $bdma)
1064 #.(ppc-opcode bdzfla+ (bbo 16 $bodzf 1 1) $bboy-mask ($ppc) $bi $bdpa)
1065 #.(ppc-opcode bdzfla (bbo 16 $bodzf 1 1) $bboy-mask ($ppc) $bi $bda)
1066 #.(ppc-opcode bc- (b 16 0 0) $b-mask ($ppc) $boe $bi $bdm)
1067 #.(ppc-opcode bc+ (b 16 0 0) $b-mask ($ppc) $boe $bi $bdp)
1068 #.(ppc-opcode bc (b 16 0 0) $b-mask ($ppc) $bo $bi $bd)
1069 #.(ppc-opcode bcl- (b 16 0 1) $b-mask ($ppc) $boe $bi $bdm)
1070 #.(ppc-opcode bcl+ (b 16 0 1) $b-mask ($ppc) $boe $bi $bdp)
1071 #.(ppc-opcode bcl (b 16 0 1) $b-mask ($ppc) $bo $bi $bd)
1072 #.(ppc-opcode bca- (b 16 1 0) $b-mask ($ppc) $boe $bi $bdma)
1073 #.(ppc-opcode bca+ (b 16 1 0) $b-mask ($ppc) $boe $bi $bdpa)
1074 #.(ppc-opcode bca (b 16 1 0) $b-mask ($ppc) $bo $bi $bda)
1075 #.(ppc-opcode bcla- (b 16 1 1) $b-mask ($ppc) $boe $bi $bdma)
1076 #.(ppc-opcode bcla+ (b 16 1 1) $b-mask ($ppc) $boe $bi $bdpa)
1077 #.(ppc-opcode bcla (b 16 1 1) $b-mask ($ppc) $bo $bi $bda)
1078
1079 #.(ppc-opcode sc (sc 17 1 0) #xffffffff ($ppc))
1080
1081 #.(ppc-opcode b (b 18 0 0) $b-mask ($ppc) $li)
1082 #.(ppc-opcode bl (b 18 0 1) $b-mask ($ppc) $li)
1083 #.(ppc-opcode ba (b 18 1 0) $b-mask ($ppc) $lia)
1084 #.(ppc-opcode bla (b 18 1 1) $b-mask ($ppc) $lia)
1085
1086 #.(ppc-opcode mcrf (xl 19 0) (logior $xlbb-mask (ash 3 21) (ash 3 16)) ($ppc) $bf $bfa)
1087
1088 #.(ppc-opcode blr (xlo 19 $bou 16 0) $xlbobibb-mask ($ppc))
1089 #.(ppc-opcode blrl (xlo 19 $bou 16 1) $xlbobibb-mask ($ppc))
1090 #.(ppc-opcode bdnzlr (xlo 19 $bodnz 16 0) $xlbobibb-mask ($ppc))
1091 #.(ppc-opcode bdnzlr- (xlo 19 $bodnz 16 0) $xlbobibb-mask ($ppc))
1092 #.(ppc-opcode bdnzlr+ (xlo 19 $bodnzp 16 0) $xlbobibb-mask ($ppc))
1093 #.(ppc-opcode bdnzlrl (xlo 19 $bodnz 16 1) $xlbobibb-mask ($ppc))
1094 #.(ppc-opcode bdnzlrl- (xlo 19 $bodnz 16 1) $xlbobibb-mask ($ppc))
1095 #.(ppc-opcode bdnzlrl+ (xlo 19 $bodnzp 16 1) $xlbobibb-mask ($ppc))
1096 #.(ppc-opcode bdzlr (xlo 19 $bodz 16 0) $xlbobibb-mask ($ppc))
1097 #.(ppc-opcode bdzlr- (xlo 19 $bodz 16 0) $xlbobibb-mask ($ppc))
1098 #.(ppc-opcode bdzlr+ (xlo 19 $bodzp 16 0) $xlbobibb-mask ($ppc))
1099 #.(ppc-opcode bdzlrl (xlo 19 $bodz 16 1) $xlbobibb-mask ($ppc))
1100 #.(ppc-opcode bdzlrl- (xlo 19 $bodz 16 1) $xlbobibb-mask ($ppc))
1101 #.(ppc-opcode bdzlrl+ (xlo 19 $bodzp 16 1) $xlbobibb-mask ($ppc))
1102 #.(ppc-opcode bltlr (xlocb 19 $bot $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1103 #.(ppc-opcode bltlr- (xlocb 19 $bot $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1104 #.(ppc-opcode bltlr+ (xlocb 19 $botp $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1105 #.(ppc-opcode bltlrl (xlocb 19 $bot $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1106 #.(ppc-opcode bltlrl- (xlocb 19 $bot $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1107 #.(ppc-opcode bltlrl+ (xlocb 19 $botp $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1108 #.(ppc-opcode bgtlr (xlocb 19 $bot $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1109 #.(ppc-opcode bgtlr- (xlocb 19 $bot $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1110 #.(ppc-opcode bgtlr+ (xlocb 19 $botp $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1111 #.(ppc-opcode bgtlrl (xlocb 19 $bot $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1112 #.(ppc-opcode bgtlrl- (xlocb 19 $bot $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1113 #.(ppc-opcode bgtlrl+ (xlocb 19 $botp $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1114 #.(ppc-opcode beqlr (xlocb 19 $bot $cbeq 16) $xlbocbbb-mask ($ppc) $cr)
1115 #.(ppc-opcode beqlr- (xlocb 19 $bot $cbeq 16) $xlbocbbb-mask ($ppc) $cr)
1116 #.(ppc-opcode beqlr+ (xlocb 19 $botp $cbeq 16) $xlbocbbb-mask ($ppc) $cr)
1117 #.(ppc-opcode beqlrl (xlocb 19 $bot $cbeq 16 1) $xlbocbbb-mask ($ppc) $cr)
1118 #.(ppc-opcode beqlrl- (xlocb 19 $bot $cbeq 16 1) $xlbocbbb-mask ($ppc) $cr)
1119 #.(ppc-opcode beqlrl+ (xlocb 19 $botp $cbeq 16 1) $xlbocbbb-mask ($ppc) $cr)
1120 #.(ppc-opcode bsolr (xlocb 19 $bot $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1121 #.(ppc-opcode bsolr- (xlocb 19 $bot $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1122 #.(ppc-opcode bsolr+ (xlocb 19 $botp $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1123 #.(ppc-opcode bsolrl (xlocb 19 $bot $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1124 #.(ppc-opcode bsolrl- (xlocb 19 $bot $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1125 #.(ppc-opcode bsolrl+ (xlocb 19 $botp $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1126 #.(ppc-opcode bunlr (xlocb 19 $bot $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1127 #.(ppc-opcode bunlr- (xlocb 19 $bot $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1128 #.(ppc-opcode bunlr+ (xlocb 19 $botp $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1129 #.(ppc-opcode bunlrl (xlocb 19 $bot $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1130 #.(ppc-opcode bunlrl- (xlocb 19 $bot $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1131 #.(ppc-opcode bunlrl+ (xlocb 19 $botp $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1132 #.(ppc-opcode bgelr (xlocb 19 $bof $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1133 #.(ppc-opcode bgelr- (xlocb 19 $bof $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1134 #.(ppc-opcode bgelr+ (xlocb 19 $bofp $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1135 #.(ppc-opcode bgelrl (xlocb 19 $bof $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1136 #.(ppc-opcode bgelrl- (xlocb 19 $bof $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1137 #.(ppc-opcode bgelrl+ (xlocb 19 $bofp $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1138 #.(ppc-opcode bnllr (xlocb 19 $bof $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1139 #.(ppc-opcode bnllr- (xlocb 19 $bof $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1140 #.(ppc-opcode bnllr+ (xlocb 19 $bofp $cblt 16) $xlbocbbb-mask ($ppc) $cr)
1141 #.(ppc-opcode bnllrl (xlocb 19 $bof $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1142 #.(ppc-opcode bnllrl- (xlocb 19 $bof $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1143 #.(ppc-opcode bnllrl+ (xlocb 19 $bofp $cblt 16 1) $xlbocbbb-mask ($ppc) $cr)
1144 #.(ppc-opcode blelr (xlocb 19 $bof $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1145 #.(ppc-opcode blelr- (xlocb 19 $bof $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1146 #.(ppc-opcode blelr+ (xlocb 19 $bofp $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1147 #.(ppc-opcode blelrl (xlocb 19 $bof $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1148 #.(ppc-opcode blelrl- (xlocb 19 $bof $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1149 #.(ppc-opcode blelrl+ (xlocb 19 $bofp $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1150 #.(ppc-opcode bnglr (xlocb 19 $bof $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1151 #.(ppc-opcode bnglr- (xlocb 19 $bof $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1152 #.(ppc-opcode bnglr+ (xlocb 19 $bofp $cbgt 16) $xlbocbbb-mask ($ppc) $cr)
1153 #.(ppc-opcode bnglrl (xlocb 19 $bof $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1154 #.(ppc-opcode bnglrl- (xlocb 19 $bof $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1155 #.(ppc-opcode bnglrl+ (xlocb 19 $bofp $cbgt 16 1) $xlbocbbb-mask ($ppc) $cr)
1156 #.(ppc-opcode bnelr (xlocb 19 $bof $cbeq 16) $xlbocbbb-mask ($ppc) $cr)
1157 #.(ppc-opcode bnelr- (xlocb 19 $bof $cbeq 16) $xlbocbbb-mask ($ppc) $cr)
1158 #.(ppc-opcode bnelr+ (xlocb 19 $bofp $cbeq 16) $xlbocbbb-mask ($ppc) $cr)
1159 #.(ppc-opcode bnelrl (xlocb 19 $bof $cbeq 16 1) $xlbocbbb-mask ($ppc) $cr)
1160 #.(ppc-opcode bnelrl- (xlocb 19 $bof $cbeq 16 1) $xlbocbbb-mask ($ppc) $cr)
1161 #.(ppc-opcode bnelrl+ (xlocb 19 $bofp $cbeq 16 1) $xlbocbbb-mask ($ppc) $cr)
1162 #.(ppc-opcode bnslr (xlocb 19 $bof $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1163 #.(ppc-opcode bnslr- (xlocb 19 $bof $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1164 #.(ppc-opcode bnslr+ (xlocb 19 $bofp $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1165 #.(ppc-opcode bnslrl (xlocb 19 $bof $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1166 #.(ppc-opcode bnslrl- (xlocb 19 $bof $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1167 #.(ppc-opcode bnslrl+ (xlocb 19 $bofp $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1168 #.(ppc-opcode bnulr (xlocb 19 $bof $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1169 #.(ppc-opcode bnulr- (xlocb 19 $bof $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1170 #.(ppc-opcode bnulr+ (xlocb 19 $bofp $cbso 16) $xlbocbbb-mask ($ppc) $cr)
1171 #.(ppc-opcode bnulrl (xlocb 19 $bof $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1172 #.(ppc-opcode bnulrl- (xlocb 19 $bof $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1173 #.(ppc-opcode bnulrl+ (xlocb 19 $bofp $cbso 16 1) $xlbocbbb-mask ($ppc) $cr)
1174 #.(ppc-opcode btlr (xlo 19 $bot 16) $xlbobb-mask ($ppc) $bi)
1175 #.(ppc-opcode btlr- (xlo 19 $bot 16) $xlbobb-mask ($ppc) $bi)
1176 #.(ppc-opcode btlr+ (xlo 19 $botp 16) $xlbobb-mask ($ppc) $bi)
1177 #.(ppc-opcode btlrl (xlo 19 $bot 16 1) $xlbobb-mask ($ppc) $bi)
1178 #.(ppc-opcode btlrl- (xlo 19 $bot 16 1) $xlbobb-mask ($ppc) $bi)
1179 #.(ppc-opcode btlrl+ (xlo 19 $botp 16 1) $xlbobb-mask ($ppc) $bi)
1180 #.(ppc-opcode bflr (xlo 19 $bof 16) $xlbobb-mask ($ppc) $bi)
1181 #.(ppc-opcode bflr- (xlo 19 $bof 16) $xlbobb-mask ($ppc) $bi)
1182 #.(ppc-opcode bflr+ (xlo 19 $bofp 16) $xlbobb-mask ($ppc) $bi)
1183 #.(ppc-opcode bflrl (xlo 19 $bof 16 1) $xlbobb-mask ($ppc) $bi)
1184 #.(ppc-opcode bflrl- (xlo 19 $bof 16 1) $xlbobb-mask ($ppc) $bi)
1185 #.(ppc-opcode bflrl+ (xlo 19 $bofp 16 1) $xlbobb-mask ($ppc) $bi)
1186 #.(ppc-opcode bdnztlr (xlo 19 $bodnzt 16) $xlbobb-mask ($ppc) $bi)
1187 #.(ppc-opcode bdnztlr- (xlo 19 $bodnzt 16) $xlbobb-mask ($ppc) $bi)
1188 #.(ppc-opcode bdnztlr+ (xlo 19 $bodnztp 16) $xlbobb-mask ($ppc) $bi)
1189 #.(ppc-opcode bdnztlrl (xlo 19 $bodnzt 16 1) $xlbobb-mask ($ppc) $bi)
1190 #.(ppc-opcode bdnztlrl- (xlo 19 $bodnzt 16 1) $xlbobb-mask ($ppc) $bi)
1191 #.(ppc-opcode bdnztlrl+ (xlo 19 $bodnztp 16 1) $xlbobb-mask ($ppc) $bi)
1192 #.(ppc-opcode bdnzflr (xlo 19 $bodnzf 16) $xlbobb-mask ($ppc) $bi)
1193 #.(ppc-opcode bdnzflr- (xlo 19 $bodnzf 16) $xlbobb-mask ($ppc) $bi)
1194 #.(ppc-opcode bdnzflr+ (xlo 19 $bodnzfp 16) $xlbobb-mask ($ppc) $bi)
1195 #.(ppc-opcode bdnzflrl (xlo 19 $bodnzf 16 1) $xlbobb-mask ($ppc) $bi)
1196 #.(ppc-opcode bdnzflrl- (xlo 19 $bodnzf 16 1) $xlbobb-mask ($ppc) $bi)
1197 #.(ppc-opcode bdnzflrl+ (xlo 19 $bodnzfp 16 1) $xlbobb-mask ($ppc) $bi)
1198 #.(ppc-opcode bdztlr (xlo 19 $bodzt 16) $xlbobb-mask ($ppc) $bi)
1199 #.(ppc-opcode bdztlr- (xlo 19 $bodzt 16) $xlbobb-mask ($ppc) $bi)
1200 #.(ppc-opcode bdztlr+ (xlo 19 $bodztp 16) $xlbobb-mask ($ppc) $bi)
1201 #.(ppc-opcode bdztlrl (xlo 19 $bodzt 16 1) $xlbobb-mask ($ppc) $bi)
1202 #.(ppc-opcode bdztlrl- (xlo 19 $bodzt 16 1) $xlbobb-mask ($ppc) $bi)
1203 #.(ppc-opcode bdztlrl+ (xlo 19 $bodztp 16 1) $xlbobb-mask ($ppc) $bi)
1204 #.(ppc-opcode bdzflr (xlo 19 $bodzf 16) $xlbobb-mask ($ppc) $bi)
1205 #.(ppc-opcode bdzflr- (xlo 19 $bodzf 16) $xlbobb-mask ($ppc) $bi)
1206 #.(ppc-opcode bdzflr+ (xlo 19 $bodzfp 16) $xlbobb-mask ($ppc) $bi)
1207 #.(ppc-opcode bdzflrl (xlo 19 $bodzf 16 1) $xlbobb-mask ($ppc) $bi)
1208 #.(ppc-opcode bdzflrl- (xlo 19 $bodzf 16 1) $xlbobb-mask ($ppc) $bi)
1209 #.(ppc-opcode bdzflrl+ (xlo 19 $bodzfp 16 1) $xlbobb-mask ($ppc) $bi)
1210 #.(ppc-opcode bclr (xllk 19 16) $xlybb-mask ($ppc) $bo $bi)
1211 #.(ppc-opcode bclrl (xllk 19 16 1) $xlybb-mask ($ppc) $bo $bi)
1212 #.(ppc-opcode bclr+ (xlylk 19 16 1) $xlybb-mask ($ppc) $boe $bi)
1213 #.(ppc-opcode bclrl+ (xlylk 19 16 1 1) $xlybb-mask ($ppc) $boe $bi)
1214 #.(ppc-opcode bclr- (xlylk 19 16 0) $xlybb-mask ($ppc) $boe $bi)
1215 #.(ppc-opcode bclrl- (xlylk 19 16 1) $xlybb-mask ($ppc) $boe $bi)
1216
1217 #.(ppc-opcode crnot (xl 19 33) $xl-mask ($ppc) $bt $ba $bba)
1218 #.(ppc-opcode crnor (xl 19 33) $xl-mask ($ppc) $bt $ba $bb)
1219
1220 #.(ppc-opcode rfi (xl 19 50) #xffffffff ($ppc) )
1221
1222
1223 #.(ppc-opcode crandc (xl 19 129) $xl-mask ($ppc) $bt $ba $bb)
1224
1225 #.(ppc-opcode isync (xl 19 150) #xffffffff ($ppc))
1226
1227 #.(ppc-opcode crclr (xl 19 193) $xl-mask ($ppc) $bt $bat $bba)
1228 #.(ppc-opcode crxor (xl 19 193) $xl-mask ($ppc) $bt $ba $bb)
1229
1230 #.(ppc-opcode crnand (xl 19 225) $xl-mask ($ppc) $bt $ba $bb)
1231
1232 #.(ppc-opcode crand (xl 19 257) $xl-mask ($ppc) $bt $ba $bb)
1233
1234 #.(ppc-opcode crset (xl 19 289) $xl-mask ($ppc) $bt $bat $bba)
1235 #.(ppc-opcode creqv (xl 19 289) $xl-mask ($ppc) $bt $ba $bb)
1236
1237 #.(ppc-opcode crorc (xl 19 417) $xl-mask ($ppc) $bt $ba $bb)
1238
1239 #.(ppc-opcode crmove (xl 19 449) $xl-mask ($ppc) $bt $ba $bba)
1240 #.(ppc-opcode cror (xl 19 449) $xl-mask ($ppc) $bt $ba $bb)
1241
1242 #.(ppc-opcode bctr (xlo 19 $bou 528) $xlbobibb-mask ($ppc) )
1243 #.(ppc-opcode bctrl (xlo 19 $bou 528 1) $xlbobibb-mask ($ppc) )
1244 #.(ppc-opcode bltctr (xlocb 19 $bot $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1245 #.(ppc-opcode bltctr- (xlocb 19 $bot $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1246 #.(ppc-opcode bltctr+ (xlocb 19 $botp $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1247 #.(ppc-opcode bltctrl (xlocb 19 $bot $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1248 #.(ppc-opcode bltctrl- (xlocb 19 $bot $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1249 #.(ppc-opcode bltctrl+ (xlocb 19 $botp $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1250 #.(ppc-opcode bgtctr (xlocb 19 $bot $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1251 #.(ppc-opcode bgtctr- (xlocb 19 $bot $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1252 #.(ppc-opcode bgtctr+ (xlocb 19 $botp $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1253 #.(ppc-opcode bgtctrl (xlocb 19 $bot $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1254 #.(ppc-opcode bgtctrl- (xlocb 19 $bot $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1255 #.(ppc-opcode bgtctrl+ (xlocb 19 $botp $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1256 #.(ppc-opcode beqctr (xlocb 19 $bot $cbeq 528) $xlbocbbb-mask ($ppc) $cr)
1257 #.(ppc-opcode beqctr- (xlocb 19 $bot $cbeq 528) $xlbocbbb-mask ($ppc) $cr)
1258 #.(ppc-opcode beqctr+ (xlocb 19 $botp $cbeq 528) $xlbocbbb-mask ($ppc) $cr)
1259 #.(ppc-opcode beqctrl (xlocb 19 $bot $cbeq 528 1) $xlbocbbb-mask ($ppc) $cr)
1260 #.(ppc-opcode beqctrl- (xlocb 19 $bot $cbeq 528 1) $xlbocbbb-mask ($ppc) $cr)
1261 #.(ppc-opcode beqctrl+ (xlocb 19 $botp $cbeq 528 1) $xlbocbbb-mask ($ppc) $cr)
1262 #.(ppc-opcode bsoctr (xlocb 19 $bot $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1263 #.(ppc-opcode bsoctr- (xlocb 19 $bot $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1264 #.(ppc-opcode bsoctr+ (xlocb 19 $botp $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1265 #.(ppc-opcode bsoctrl (xlocb 19 $bot $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1266 #.(ppc-opcode bsoctrl- (xlocb 19 $bot $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1267 #.(ppc-opcode bsoctrl+ (xlocb 19 $botp $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1268 #.(ppc-opcode bunctr (xlocb 19 $bot $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1269 #.(ppc-opcode bunctr- (xlocb 19 $bot $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1270 #.(ppc-opcode bunctr+ (xlocb 19 $botp $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1271 #.(ppc-opcode bunctrl (xlocb 19 $bot $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1272 #.(ppc-opcode bunctrl- (xlocb 19 $bot $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1273 #.(ppc-opcode bunctrl+ (xlocb 19 $botp $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1274 #.(ppc-opcode bgectr (xlocb 19 $bof $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1275 #.(ppc-opcode bgectr- (xlocb 19 $bof $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1276 #.(ppc-opcode bgectr+ (xlocb 19 $bofp $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1277 #.(ppc-opcode bgectrl (xlocb 19 $bof $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1278 #.(ppc-opcode bgectrl- (xlocb 19 $bof $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1279 #.(ppc-opcode bgectrl+ (xlocb 19 $bofp $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1280 #.(ppc-opcode bnlctr (xlocb 19 $bof $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1281 #.(ppc-opcode bnlctr- (xlocb 19 $bof $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1282 #.(ppc-opcode bnlctr+ (xlocb 19 $bofp $cblt 528) $xlbocbbb-mask ($ppc) $cr)
1283 #.(ppc-opcode bnlctrl (xlocb 19 $bof $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1284 #.(ppc-opcode bnlctrl- (xlocb 19 $bof $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1285 #.(ppc-opcode bnlctrl+ (xlocb 19 $bofp $cblt 528 1) $xlbocbbb-mask ($ppc) $cr)
1286 #.(ppc-opcode blectr (xlocb 19 $bof $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1287 #.(ppc-opcode blectr- (xlocb 19 $bof $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1288 #.(ppc-opcode blectr+ (xlocb 19 $bofp $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1289 #.(ppc-opcode blectrl (xlocb 19 $bof $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1290 #.(ppc-opcode blectrl- (xlocb 19 $bof $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1291 #.(ppc-opcode blectrl+ (xlocb 19 $bofp $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1292 #.(ppc-opcode bngctr (xlocb 19 $bof $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1293 #.(ppc-opcode bngctr- (xlocb 19 $bof $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1294 #.(ppc-opcode bngctr+ (xlocb 19 $bofp $cbgt 528) $xlbocbbb-mask ($ppc) $cr)
1295 #.(ppc-opcode bngctrl (xlocb 19 $bof $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1296 #.(ppc-opcode bngctrl- (xlocb 19 $bof $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1297 #.(ppc-opcode bngctrl+ (xlocb 19 $bofp $cbgt 528 1) $xlbocbbb-mask ($ppc) $cr)
1298 #.(ppc-opcode bnectr (xlocb 19 $bof $cbeq 528) $xlbocbbb-mask ($ppc) $cr)
1299 #.(ppc-opcode bnectr- (xlocb 19 $bof $cbeq 528) $xlbocbbb-mask ($ppc) $cr)
1300 #.(ppc-opcode bnectr+ (xlocb 19 $bofp $cbeq 528) $xlbocbbb-mask ($ppc) $cr)
1301 #.(ppc-opcode bnectrl (xlocb 19 $bof $cbeq 528 1) $xlbocbbb-mask ($ppc) $cr)
1302 #.(ppc-opcode bnectrl- (xlocb 19 $bof $cbeq 528 1) $xlbocbbb-mask ($ppc) $cr)
1303 #.(ppc-opcode bnectrl+ (xlocb 19 $bofp $cbeq 528 1) $xlbocbbb-mask ($ppc) $cr)
1304 #.(ppc-opcode bnsctr (xlocb 19 $bof $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1305 #.(ppc-opcode bnsctr- (xlocb 19 $bof $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1306 #.(ppc-opcode bnsctr+ (xlocb 19 $bofp $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1307 #.(ppc-opcode bnsctrl (xlocb 19 $bof $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1308 #.(ppc-opcode bnsctrl- (xlocb 19 $bof $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1309 #.(ppc-opcode bnsctrl+ (xlocb 19 $bofp $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1310 #.(ppc-opcode bnuctr (xlocb 19 $bof $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1311 #.(ppc-opcode bnuctr- (xlocb 19 $bof $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1312 #.(ppc-opcode bnuctr+ (xlocb 19 $bofp $cbso 528) $xlbocbbb-mask ($ppc) $cr)
1313 #.(ppc-opcode bnuctrl (xlocb 19 $bof $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1314 #.(ppc-opcode bnuctrl- (xlocb 19 $bof $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1315 #.(ppc-opcode bnuctrl+ (xlocb 19 $bofp $cbso 528 1) $xlbocbbb-mask ($ppc) $cr)
1316 #.(ppc-opcode btctr (xlo 19 $bot 528) $xlbobb-mask ($ppc) $bi)
1317 #.(ppc-opcode btctr- (xlo 19 $bot 528) $xlbobb-mask ($ppc) $bi)
1318 #.(ppc-opcode btctr+ (xlo 19 $botp 528) $xlbobb-mask ($ppc) $bi)
1319 #.(ppc-opcode btctrl (xlo 19 $bot 528 1) $xlbobb-mask ($ppc) $bi)
1320 #.(ppc-opcode btctrl- (xlo 19 $bot 528 1) $xlbobb-mask ($ppc) $bi)
1321 #.(ppc-opcode btctrl+ (xlo 19 $botp 528 1) $xlbobb-mask ($ppc) $bi)
1322 #.(ppc-opcode bfctr (xlo 19 $bof 528) $xlbobb-mask ($ppc) $bi)
1323 #.(ppc-opcode bfctr- (xlo 19 $bof 528) $xlbobb-mask ($ppc) $bi)
1324 #.(ppc-opcode bfctr+ (xlo 19 $bofp 528) $xlbobb-mask ($ppc) $bi)
1325 #.(ppc-opcode bfctrl (xlo 19 $bof 528 1) $xlbobb-mask ($ppc) $bi)
1326 #.(ppc-opcode bfctrl- (xlo 19 $bof 528 1) $xlbobb-mask ($ppc) $bi)
1327 #.(ppc-opcode bfctrl+ (xlo 19 $bofp 528 1) $xlbobb-mask ($ppc) $bi)
1328 #.(ppc-opcode bcctr (xllk 19 528) $xlybb-mask ($ppc) $bo $bi)
1329 #.(ppc-opcode bcctr- (xlylk 19 528 0) $xlybb-mask ($ppc) $boe $bi)
1330 #.(ppc-opcode bcctr+ (xlylk 19 528 1) $xlybb-mask ($ppc) $boe $bi)
1331 #.(ppc-opcode bcctrl (xllk 19 528 1) $xlybb-mask ($ppc) $bo $bi)
1332 #.(ppc-opcode bcctrl- (xlylk 19 528 1) $xlybb-mask ($ppc) $boe $bi)
1333 #.(ppc-opcode bcctrl+ (xlylk 19 528 1 1) $xlybb-mask ($ppc) $boe $bi)
1334
1335 #.(ppc-opcode rlwimi (m 20) $m-mask ($ppc) $rta $rs $sh $mb $me)
1336
1337 #.(ppc-opcode rlwimi. (m 20 1) $m-mask ($ppc) $rta $rs $sh $mb $me)
1338
1339 #.(ppc-opcode rotlwi (mme 21 31) $mmbme-mask ($ppc) $rta $rs $sh)
1340 #.(ppc-opcode clrlwi (mme 21 31) $mshme-mask ($ppc) $rta $rs $mb)
1341 #.(ppc-opcode rlwinm (m 21) $m-mask ($ppc) $rta $rs $sh $mb $me)
1342 #.(ppc-opcode rotlwi. (mme 21 31 1) $mmbme-mask ($ppc) $rta $rs $sh)
1343 #.(ppc-opcode clrlwi. (mme 21 31 1) $mshme-mask ($ppc) $rta $rs $mb)
1344 #.(ppc-opcode rlwinm. (m 21 1) $m-mask ($ppc) $rta $rs $sh $mb $me)
1345
1346 #.(ppc-opcode rotlw (mme 23 31) $mmbme-mask ($ppc) $rta $rs $rb)
1347 #.(ppc-opcode rlwnm (m 23) $m-mask ($ppc) $rta $rs $rb $mb $me)
1348 #.(ppc-opcode rotlw. (mme 23 31 1) $mmbme-mask ($ppc) $rta $rs $rb)
1349 #.(ppc-opcode rlwnm. (m 23 1) $m-mask ($ppc) $rta $rs $rb $mb $me)
1350
1351 #.(ppc-opcode nop (op 24) #xffffffff ($ppc))
1352 #.(ppc-opcode ori (op 24) $op-mask ($ppc) $rta $rs $ui)
1353
1354 #.(ppc-opcode oris (op 25) $op-mask ($ppc) $rta $rs $ui)
1355
1356 #.(ppc-opcode xori (op 26) $op-mask ($ppc) $rta $rs $ui)
1357
1358 #.(ppc-opcode xoris (op 27) $op-mask ($ppc) $rta $rs $ui)
1359
1360 #.(ppc-opcode andi. (op 28) $op-mask ($ppc) $rta $rs $ui)
1361
1362 #.(ppc-opcode andis. (op 29) $op-mask ($ppc) $rta $rs $ui)
1363
1364 #.(ppc-opcode rotldi (md 30 0 0) $mdmb-mask ($ppc $b64) $rta $rs $sh6)
1365 #.(ppc-opcode clrldi (md 30 0 0) $mdsh-mask ($ppc $b64) $rta $rs $mb6)
1366 #.(ppc-opcode rldicl (md 30 0 0) $md-mask ($ppc $b64) $rta $rs $sh6 $mb6)
1367 #.(ppc-opcode rotldi. (md 30 0 1) $mdmb-mask ($ppc $b64) $rta $rs $sh6)
1368 #.(ppc-opcode clrldi. (md 30 0 1) $mdsh-mask ($ppc $b64) $rta $rs $mb6)
1369 #.(ppc-opcode rldicl. (md 30 0 1) $md-mask ($ppc $b64) $rta $rs $sh6 $mb6)
1370
1371 #.(ppc-opcode rldicr (md 30 1 0) $md-mask ($ppc $b64) $rta $rs $sh6 $me6)
1372 #.(ppc-opcode rldicr. (md 30 1 1) $md-mask ($ppc $b64) $rta $rs $sh6 $me6)
1373
1374 #.(ppc-opcode rldic (md 30 2 0) $md-mask ($ppc $b64) $rta $rs $sh6 $mb6)
1375 #.(ppc-opcode rldic. (md 30 2 1) $md-mask ($ppc $b64) $rta $rs $sh6 $mb6)
1376
1377 #.(ppc-opcode rldimi (md 30 3 0) $md-mask ($ppc $b64) $rta $rs $sh6 $mb6)
1378 #.(ppc-opcode rldimi. (md 30 3 1) $md-mask ($ppc $b64) $rta $rs $sh6 $mb6)
1379
1380 #.(ppc-opcode rotld (mds 30 8 0) $mdsmb-mask ($ppc $b64) $rta $rs $rb)
1381 #.(ppc-opcode rldcl (mds 30 8 0) $mds-mask ($ppc $b64) $rta $rs $rb $mb6)
1382 #.(ppc-opcode rotld. (mds 30 8 1) $mdsmb-mask ($ppc $b64) $rta $rs $rb)
1383 #.(ppc-opcode rldcl. (mds 30 8 1) $mds-mask ($ppc $b64) $rta $rs $rb $mb6)
1384
1385 #.(ppc-opcode rldcr (mds 30 9 0) $mds-mask ($ppc $b64) $rta $rs $rb $me6)
1386 #.(ppc-opcode rldcr. (mds 30 9 1) $mds-mask ($ppc $b64) $rta $rs $rb $me6)
1387
1388 #.(ppc-opcode cmpw (xcmpl 31 0 0) $xcmpl-mask ($ppc) $obf $ra $rb)
1389
1390 #.(ppc-opcode cmpd (xcmpl 31 0 1) $xcmpl-mask ($ppc $b64) $obf $ra $rb)
1391
1392
1393 #.(ppc-opcode cmp (x 31 0) $xcmp-mask ($ppc) $bf $l $ra $rb)
1394
1395 #.(ppc-opcode twlgt (xto 31 4 $tolgt) $xto-mask ($ppc) $ra $rb)
1396 #.(ppc-opcode twllt (xto 31 4 $tollt) $xto-mask ($ppc) $ra $rb)
1397 #.(ppc-opcode tweq (xto 31 4 $toeq) $xto-mask ($ppc) $ra $rb)
1398 #.(ppc-opcode twlge (xto 31 4 $tolge) $xto-mask ($ppc) $ra $rb)
1399 #.(ppc-opcode twlnl (xto 31 4 $tolnl) $xto-mask ($ppc) $ra $rb)
1400 #.(ppc-opcode twlle (xto 31 4 $tolle) $xto-mask ($ppc) $ra $rb)
1401 #.(ppc-opcode twlng (xto 31 4 $tolng) $xto-mask ($ppc) $ra $rb)
1402 #.(ppc-opcode twgt (xto 31 4 $togt) $xto-mask ($ppc) $ra $rb)
1403 #.(ppc-opcode twge (xto 31 4 $toge) $xto-mask ($ppc) $ra $rb)
1404 #.(ppc-opcode twnl (xto 31 4 $tonl) $xto-mask ($ppc) $ra $rb)
1405 #.(ppc-opcode twlt (xto 31 4 $tolt) $xto-mask ($ppc) $ra $rb)
1406 #.(ppc-opcode twle (xto 31 4 $tole) $xto-mask ($ppc) $ra $rb)
1407 #.(ppc-opcode twng (xto 31 4 $tong) $xto-mask ($ppc) $ra $rb)
1408 #.(ppc-opcode twne (xto 31 4 $tone) $xto-mask ($ppc) $ra $rb)
1409 #.(ppc-opcode trap (xto 31 4 $tou) #xffffffff ($ppc))
1410 #.(ppc-opcode tw (x 31 4) $x-mask ($ppc) $to $ra $rb)
1411
1412 #.(ppc-opcode subfc (xo 31 8 0 0) $xo-mask ($ppc) $rt $ra $rb)
1413 #.(ppc-opcode subc (xo 31 8 0 0) $xo-mask ($ppc) $rt $rb $ra)
1414 #.(ppc-opcode subfc. (xo 31 8 0 1) $xo-mask ($ppc) $rt $ra $rb)
1415 #.(ppc-opcode subc. (xo 31 8 0 1) $xo-mask ($ppc) $rt $rb $ra)
1416 #.(ppc-opcode subfco (xo 31 8 1 0) $xo-mask ($ppc) $rt $ra $rb)
1417 #.(ppc-opcode subco (xo 31 8 1 0) $xo-mask ($ppc) $rt $rb $ra)
1418 #.(ppc-opcode subfco. (xo 31 8 1 1) $xo-mask ($ppc) $rt $ra $rb)
1419 #.(ppc-opcode subco. (xo 31 8 1 1) $xo-mask ($ppc) $rt $rb $ra)
1420
1421
1422 #.(ppc-opcode mulhdu (xo 31 9 0 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1423 #.(ppc-opcode mulhdu. (xo 31 9 0 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1424
1425
1426 #.(ppc-opcode addc (xo 31 10 0 0) $xo-mask ($ppc) $rt $ra $rb)
1427 #.(ppc-opcode addc. (xo 31 10 0 1) $xo-mask ($ppc) $rt $ra $rb)
1428 #.(ppc-opcode addco (xo 31 10 1 0) $xo-mask ($ppc) $rt $ra $rb)
1429 #.(ppc-opcode addco. (xo 31 10 1 1) $xo-mask ($ppc) $rt $ra $rb)
1430
1431 #.(ppc-opcode mulhwu (xo 31 11 0 0) $xo-mask ($ppc) $rt $ra $rb)
1432 #.(ppc-opcode mulhwu. (xo 31 11 0 1) $xo-mask ($ppc) $rt $ra $rb)
1433
1434 #.(ppc-opcode mfcr (x 31 19) $xrarb-mask ($ppc) $rt)
1435
1436 #.(ppc-opcode lwarx (x 31 20) $x-mask ($ppc) $rt $ra $rb)
1437
1438
1439 #.(ppc-opcode ldx (x 31 21) $x-mask ($ppc $b64) $rt $ra $rb)
1440
1441
1442 #.(ppc-opcode lwzx (x 31 23) $x-mask ($ppc) $rt $ra $rb)
1443
1444 #.(ppc-opcode slw (xrc 31 24) $x-mask ($ppc) $rta $rs $rb)
1445 #.(ppc-opcode slw. (xrc 31 24 1) $x-mask ($ppc) $rta $rs $rb)
1446
1447 #.(ppc-opcode cntlzw (xrc 31 26) $xrb-mask ($ppc) $rta $rs)
1448 #.(ppc-opcode cntlzw. (xrc 31 26 1) $xrb-mask ($ppc) $rta $rs)
1449
1450
1451 #.(ppc-opcode sld (xrc 31 27) $x-mask ($ppc $b64) $rta $rs $rb)
1452 #.(ppc-opcode sld. (xrc 31 27 1) $x-mask ($ppc $b64) $rta $rs $rb)
1453
1454
1455 #.(ppc-opcode and (xrc 31 28) $x-mask ($ppc) $rta $rs $rb)
1456 #.(ppc-opcode and. (xrc 31 28 1) $x-mask ($ppc) $rta $rs $rb)
1457
1458 #.(ppc-opcode cmplw (xcmpl 31 32 0) $xcmpl-mask ($ppc) $obf $ra $rb)
1459
1460 #.(ppc-opcode cmpld (xcmpl 31 32 1) $xcmpl-mask ($ppc $b64) $obf $ra $rb)
1461
1462 #.(ppc-opcode cmpl (x 31 32) $xcmp-mask ($ppc) $bf $l $ra $rb)
1463
1464 #.(ppc-opcode subf (xo 31 40 0 0) $xo-mask ($ppc) $rt $ra $rb)
1465 #.(ppc-opcode sub (xo 31 40 0 0) $xo-mask ($ppc) $rt $rb $ra)
1466 #.(ppc-opcode subf. (xo 31 40 0 1) $xo-mask ($ppc) $rt $ra $rb)
1467 #.(ppc-opcode sub. (xo 31 40 0 1) $xo-mask ($ppc) $rt $rb $ra)
1468 #.(ppc-opcode subfo (xo 31 40 1 0) $xo-mask ($ppc) $rt $ra $rb)
1469 #.(ppc-opcode subo (xo 31 40 1 0) $xo-mask ($ppc) $rt $rb $ra)
1470 #.(ppc-opcode subfo. (xo 31 40 1 1) $xo-mask ($ppc) $rt $ra $rb)
1471 #.(ppc-opcode subo. (xo 31 40 1 1) $xo-mask ($ppc) $rt $rb $ra)
1472
1473
1474 #.(ppc-opcode ldux (x 31 53) $x-mask ($ppc $b64) $rt $ral $rb)
1475
1476
1477 #.(ppc-opcode dcbst (x 31 54) $xrt-mask ($ppc) $ra $rb)
1478
1479 #.(ppc-opcode lwzux (x 31 55) $x-mask ($ppc) $rt $ral $rb)
1480
1481
1482 #.(ppc-opcode cntlzd (xrc 31 58) $xrb-mask ($ppc $b64) $rta $rs)
1483 #.(ppc-opcode cntlzd. (xrc 31 58 1) $xrb-mask ($ppc $b64) $rta $rs)
1484
1485
1486 #.(ppc-opcode andc (xrc 31 60) $x-mask ($ppc) $rta $rs $rb)
1487 #.(ppc-opcode andc. (xrc 31 60 1) $x-mask ($ppc) $rta $rs $rb)
1488
1489
1490 #.(ppc-opcode tdlgt (xto 31 68 $tolgt) $xto-mask ($ppc $b64) $ra $rb)
1491 #.(ppc-opcode tdllt (xto 31 68 $tollt) $xto-mask ($ppc $b64) $ra $rb)
1492 #.(ppc-opcode tdeq (xto 31 68 $toeq) $xto-mask ($ppc $b64) $ra $rb)
1493 #.(ppc-opcode tdlge (xto 31 68 $tolge) $xto-mask ($ppc $b64) $ra $rb)
1494 #.(ppc-opcode tdlnl (xto 31 68 $tolnl) $xto-mask ($ppc $b64) $ra $rb)
1495 #.(ppc-opcode tdlle (xto 31 68 $tolle) $xto-mask ($ppc $b64) $ra $rb)
1496 #.(ppc-opcode tdlng (xto 31 68 $tolng) $xto-mask ($ppc $b64) $ra $rb)
1497 #.(ppc-opcode tdgt (xto 31 68 $togt) $xto-mask ($ppc $b64) $ra $rb)
1498 #.(ppc-opcode tdge (xto 31 68 $toge) $xto-mask ($ppc $b64) $ra $rb)
1499 #.(ppc-opcode tdnl (xto 31 68 $tonl) $xto-mask ($ppc $b64) $ra $rb)
1500 #.(ppc-opcode tdlt (xto 31 68 $tolt) $xto-mask ($ppc $b64) $ra $rb)
1501 #.(ppc-opcode tdle (xto 31 68 $tole) $xto-mask ($ppc $b64) $ra $rb)
1502 #.(ppc-opcode tdng (xto 31 68 $tong) $xto-mask ($ppc $b64) $ra $rb)
1503 #.(ppc-opcode tdne (xto 31 68 $tone) $xto-mask ($ppc $b64) $ra $rb)
1504 #.(ppc-opcode td (x 31 68) $x-mask ($ppc $b64) $to $ra $rb)
1505
1506 #.(ppc-opcode mulhd (xo 31 73 0 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1507 #.(ppc-opcode mulhd. (xo 31 73 0 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1508
1509
1510 #.(ppc-opcode mulhw (xo 31 75 0 0) $xo-mask ($ppc) $rt $ra $rb)
1511 #.(ppc-opcode mulhw. (xo 31 75 0 1) $xo-mask ($ppc) $rt $ra $rb)
1512
1513 #.(ppc-opcode mfmsr (x 31 83) $xrarb-mask ($ppc) $rt)
1514
1515
1516 #.(ppc-opcode ldarx (x 31 84) $x-mask ($ppc $b64) $rt $ra $rb)
1517
1518
1519 #.(ppc-opcode dcbf (x 31 86) $xrt-mask ($ppc) $ra $rb)
1520
1521 #.(ppc-opcode lbzx (x 31 87) $x-mask ($ppc) $rt $ra $rb)
1522
1523 #.(ppc-opcode neg (xo 31 104 0 0) $xorb-mask ($ppc) $rt $ra)
1524 #.(ppc-opcode neg. (xo 31 104 0 1) $xorb-mask ($ppc) $rt $ra)
1525 #.(ppc-opcode nego (xo 31 104 1 0) $xorb-mask ($ppc) $rt $ra)
1526 #.(ppc-opcode nego. (xo 31 104 1 1) $xorb-mask ($ppc) $rt $ra)
1527
1528 #.(ppc-opcode lbzux (x 31 119) $x-mask ($ppc) $rt $ral $rb)
1529
1530 #.(ppc-opcode not (xrc 31 124) $x-mask ($ppc) $rta $rs $rbs)
1531 #.(ppc-opcode nor (xrc 31 124) $x-mask ($ppc) $rta $rs $rb)
1532 #.(ppc-opcode not. (xrc 31 124 1) $x-mask ($ppc) $rta $rs $rbs)
1533 #.(ppc-opcode nor. (xrc 31 124 1) $x-mask ($ppc) $rta $rs $rb)
1534
1535 #.(ppc-opcode subfe (xo 31 136 0 0) $xo-mask ($ppc) $rt $ra $rb)
1536 #.(ppc-opcode subfe. (xo 31 136 0 1) $xo-mask ($ppc) $rt $ra $rb)
1537 #.(ppc-opcode subfeo (xo 31 136 1 0) $xo-mask ($ppc) $rt $ra $rb)
1538 #.(ppc-opcode subfeo. (xo 31 136 1 1) $xo-mask ($ppc) $rt $ra $rb)
1539
1540 #.(ppc-opcode adde (xo 31 138 0 0) $xo-mask ($ppc) $rt $ra $rb)
1541 #.(ppc-opcode adde. (xo 31 138 0 1) $xo-mask ($ppc) $rt $ra $rb)
1542 #.(ppc-opcode addeo (xo 31 138 1 0) $xo-mask ($ppc) $rt $ra $rb)
1543 #.(ppc-opcode addeo. (xo 31 138 1 1) $xo-mask ($ppc) $rt $ra $rb)
1544
1545 #.(ppc-opcode mtcrf (x 31 144) (logior $x-mask (ash 1 20) (ash 1 11)) ($ppc) $fxm $rs)
1546
1547 #.(ppc-opcode mtmsr (x 31 146) $xrarb-mask ($ppc) $rs)
1548
1549
1550 #.(ppc-opcode stdx (x 31 149) $x-mask ($ppc $b64) $rs $ra $rb)
1551
1552
1553 #.(ppc-opcode stwcx. (xrc 31 150 1) $x-mask ($ppc) $rs $ra $rb)
1554
1555 #.(ppc-opcode stwx (x 31 151) $x-mask ($ppc) $rs $ra $rb)
1556
1557 #.(ppc-opcode stdux (x 31 181) $x-mask ($ppc $b64) $rs $ras $rb)
1558
1559 #.(ppc-opcode stwux (x 31 183) $x-mask ($ppc) $rs $ras $rb)
1560
1561 #.(ppc-opcode subfze (xo 31 200 0 0) $xorb-mask ($ppc) $rt $ra)
1562 #.(ppc-opcode subfze. (xo 31 200 0 1) $xorb-mask ($ppc) $rt $ra)
1563 #.(ppc-opcode subfzeo (xo 31 200 1 0) $xorb-mask ($ppc) $rt $ra)
1564 #.(ppc-opcode subfzeo. (xo 31 200 1 1) $xorb-mask ($ppc) $rt $ra)
1565
1566 #.(ppc-opcode addze (xo 31 202 0 0) $xorb-mask ($ppc) $rt $ra)
1567 #.(ppc-opcode addze. (xo 31 202 0 1) $xorb-mask ($ppc) $rt $ra)
1568 #.(ppc-opcode addzeo (xo 31 202 1 0) $xorb-mask ($ppc) $rt $ra)
1569 #.(ppc-opcode addzeo. (xo 31 202 1 1) $xorb-mask ($ppc) $rt $ra)
1570
1571 #.(ppc-opcode mtsr (x 31 210) (logior $xrb-mask (ash 1 20)) ($ppc $b32) $sr $rs)
1572
1573 #.(ppc-opcode stdcx. (xrc 31 214 1) $x-mask ($ppc $b64) $rs $ra $rb)
1574
1575 #.(ppc-opcode stbx (x 31 215) $x-mask ($ppc) $rs $ra $rb)
1576
1577 #.(ppc-opcode subfme (xo 31 232 0 0) $xorb-mask ($ppc) $rt $ra)
1578 #.(ppc-opcode subfme. (xo 31 232 0 1) $xorb-mask ($ppc) $rt $ra)
1579 #.(ppc-opcode subfmeo (xo 31 232 1 0) $xorb-mask ($ppc) $rt $ra)
1580 #.(ppc-opcode subfmeo. (xo 31 232 1 1) $xorb-mask ($ppc) $rt $ra)
1581
1582
1583 #.(ppc-opcode mulld (xo 31 233 0 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1584 #.(ppc-opcode mulld. (xo 31 233 0 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1585 #.(ppc-opcode mulldo (xo 31 233 1 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1586 #.(ppc-opcode mulldo. (xo 31 233 1 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1587
1588
1589 #.(ppc-opcode addme (xo 31 234 0 0) $xorb-mask ($ppc) $rt $ra)
1590 #.(ppc-opcode addme. (xo 31 234 0 1) $xorb-mask ($ppc) $rt $ra)
1591 #.(ppc-opcode addmeo (xo 31 234 1 0) $xorb-mask ($ppc) $rt $ra)
1592 #.(ppc-opcode addmeo. (xo 31 234 1 1) $xorb-mask ($ppc) $rt $ra)
1593
1594 #.(ppc-opcode mullw (xo 31 235 0 0) $xo-mask ($ppc) $rt $ra $rb)
1595 #.(ppc-opcode mullw. (xo 31 235 0 1) $xo-mask ($ppc) $rt $ra $rb)
1596 #.(ppc-opcode mullwo (xo 31 235 1 0) $xo-mask ($ppc) $rt $ra $rb)
1597 #.(ppc-opcode mullwo. (xo 31 235 1 1) $xo-mask ($ppc) $rt $ra $rb)
1598
1599 #.(ppc-opcode mtsrin (x 31 242) $xra-mask ($ppc $b32) $rs $rb)
1600
1601 #.(ppc-opcode dcbtst (x 31 246) $xrt-mask ($ppc) $ra $rb)
1602
1603 #.(ppc-opcode stbux (x 31 247) $x-mask ($ppc) $rs $ras $rb)
1604
1605 #.(ppc-opcode add (xo 31 266 0 0) $xo-mask ($ppc) $rt $ra $rb)
1606 #.(ppc-opcode add. (xo 31 266 0 1) $xo-mask ($ppc) $rt $ra $rb)
1607 #.(ppc-opcode addo (xo 31 266 1 0) $xo-mask ($ppc) $rt $ra $rb)
1608 #.(ppc-opcode addo. (xo 31 266 1 1) $xo-mask ($ppc) $rt $ra $rb)
1609
1610 #.(ppc-opcode dcbt (x 31 278) $xrt-mask ($ppc) $ra $rb)
1611
1612 #.(ppc-opcode lhzx (x 31 279) $x-mask ($ppc) $rt $ra $rb)
1613
1614 #.(ppc-opcode eqv (xrc 31 284) $x-mask ($ppc) $rta $rs $rb)
1615 #.(ppc-opcode eqv. (xrc 31 284 1) $x-mask ($ppc) $rta $rs $rb)
1616
1617 #.(ppc-opcode tlbie (x 31 306) $xrtra-mask ($ppc) $rb)
1618
1619 #.(ppc-opcode eciwx (x 31 310) $x-mask ($ppc) $rt $ra $rb)
1620
1621 #.(ppc-opcode lhzux (x 31 311) $x-mask ($ppc) $rt $ral $rb)
1622
1623 #.(ppc-opcode xor (xrc 31 316) $x-mask ($ppc) $rta $rs $rb)
1624 #.(ppc-opcode xor. (xrc 31 316 1) $x-mask ($ppc) $rta $rs $rb)
1625
1626 #.(ppc-opcode mfxer (xspr 31 339 1) $xspr-mask ($ppc) $rt)
1627 #.(ppc-opcode mflr (xspr 31 339 8) $xspr-mask ($ppc) $rt)
1628 #.(ppc-opcode mfctr (xspr 31 339 9) $xspr-mask ($ppc) $rt)
1629 #.(ppc-opcode mfspr (x 31 339) $x-mask ($ppc) $rt $spr)
1630
1631
1632 #.(ppc-opcode lwax (x 31 341) $x-mask ($ppc $b64) $rt $ra $rb)
1633
1634 #.(ppc-opcode lhax (x 31 343) $x-mask ($ppc) $rt $ra $rb)
1635
1636
1637 #.(ppc-opcode tlbia (x 31 370) #xffffffff ($ppc))
1638
1639 #.(ppc-opcode mftb (x 31 371) $x-mask ($ppc) $rt $tbr)
1640
1641
1642 #.(ppc-opcode lwaux (x 31 373) $x-mask ($ppc $b64) $rt $ral $rb)
1643
1644 #.(ppc-opcode lhaux (x 31 375) $x-mask ($ppc) $rt $ral $rb)
1645
1646 #.(ppc-opcode sthx (x 31 407) $x-mask ($ppc) $rs $ra $rb)
1647 #.(ppc-opcode orc (xrc 31 412) $x-mask ($ppc) $rta $rs $rb)
1648 #.(ppc-opcode orc. (xrc 31 412 1) $x-mask ($ppc) $rta $rs $rb)
1649
1650 #.(ppc-opcode sradi (xs 31 413) $xs-mask ($ppc $b64) $rta $rs $sh6)
1651 #.(ppc-opcode sradi. (xs 31 413 1) $xs-mask ($ppc $b64) $rta $rs $sh6)
1652
1653 #.(ppc-opcode slbie (x 31 434) $xrtra-mask ($ppc $b64) $rb)
1654
1655
1656 #.(ppc-opcode ecowx (x 31 438) $x-mask ($ppc) $rt $ra $rb)
1657
1658 #.(ppc-opcode sthux (x 31 439) $x-mask ($ppc) $rs $ras $rb)
1659
1660 #.(ppc-opcode mr (xrc 31 444) $x-mask ($ppc) $rta $rs $rbs)
1661 #.(ppc-opcode or (xrc 31 444) $x-mask ($ppc) $rta $rs $rb)
1662 #.(ppc-opcode mr. (xrc 31 444 1) $x-mask ($ppc) $rta $rs $rbs)
1663 #.(ppc-opcode or. (xrc 31 444 1) $x-mask ($ppc) $rta $rs $rb)
1664
1665
1666 #.(ppc-opcode divdu (xo 31 457 0 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1667 #.(ppc-opcode divdu. (xo 31 457 0 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1668 #.(ppc-opcode divduo (xo 31 457 1 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1669 #.(ppc-opcode divduo. (xo 31 457 1 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1670
1671
1672 #.(ppc-opcode divwu (xo 31 459 0 0) $xo-mask ($ppc) $rt $ra $rb)
1673 #.(ppc-opcode divwu. (xo 31 459 0 1) $xo-mask ($ppc) $rt $ra $rb)
1674 #.(ppc-opcode divwuo (xo 31 459 1 0) $xo-mask ($ppc) $rt $ra $rb)
1675 #.(ppc-opcode divwuo. (xo 31 459 1 1) $xo-mask ($ppc) $rt $ra $rb)
1676
1677 #.(ppc-opcode mtxer (xspr 31 467 1) $xspr-mask ($ppc) $rs)
1678 #.(ppc-opcode mtlr (xspr 31 467 8) $xspr-mask ($ppc) $rs)
1679 #.(ppc-opcode mtctr (xspr 31 467 9) $xspr-mask ($ppc) $rs)
1680 #.(ppc-opcode mtspr (x 31 467) $x-mask ($ppc) $spr $rs)
1681
1682 #.(ppc-opcode dcbi (x 31 470) $xrt-mask ($ppc) $ra $rb)
1683
1684 #.(ppc-opcode nand (xrc 31 476) $x-mask ($ppc) $rta $rs $rb)
1685 #.(ppc-opcode nand. (xrc 31 476 1) $x-mask ($ppc) $rta $rs $rb)
1686
1687
1688 #.(ppc-opcode divd (xo 31 489 0 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1689 #.(ppc-opcode divd. (xo 31 489 0 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1690 #.(ppc-opcode divdo (xo 31 489 1 0) $xo-mask ($ppc $b64) $rt $ra $rb)
1691 #.(ppc-opcode divdo. (xo 31 489 1 1) $xo-mask ($ppc $b64) $rt $ra $rb)
1692
1693 #.(ppc-opcode divw (xo 31 491 0 0) $xo-mask ($ppc) $rt $ra $rb)
1694 #.(ppc-opcode divw. (xo 31 491 0 1) $xo-mask ($ppc) $rt $ra $rb)
1695 #.(ppc-opcode divwo (xo 31 491 1 0) $xo-mask ($ppc) $rt $ra $rb)
1696 #.(ppc-opcode divwo. (xo 31 491 1 1) $xo-mask ($ppc) $rt $ra $rb)
1697
1698
1699 #.(ppc-opcode slbia (x 31 498) #xffffffff ($ppc $b64))
1700
1701
1702
1703 #.(ppc-opcode mcrxr (x 31 512) (logior $xrarb-mask (ash 3 21)) ($ppc) $bf)
1704
1705 #.(ppc-opcode lswx (x 31 533) $x-mask ($ppc) $rt $ra $rb)
1706
1707 #.(ppc-opcode lwbrx (x 31 534) $x-mask ($ppc) $rt $ra $rb)
1708
1709 #.(ppc-opcode lfsx (x 31 535) $x-mask ($ppc) $frt $ra $rb)
1710
1711 #.(ppc-opcode srw (xrc 31 536) $x-mask ($ppc) $rta $rs $rb)
1712 #.(ppc-opcode srw. (xrc 31 536 1) $x-mask ($ppc) $rta $rs $rb)
1713
1714
1715
1716 #.(ppc-opcode srd (xrc 31 539) $x-mask ($ppc $b64) $rta $rs $rb)
1717 #.(ppc-opcode srd. (xrc 31 539 1) $x-mask ($ppc $b64) $rta $rs $rb)
1718
1719
1720 #.(ppc-opcode tlbsync (x 31 566) #xffffffff ($ppc))
1721
1722 #.(ppc-opcode lfsux (x 31 567) $x-mask ($ppc) $frt $ras $rb)
1723
1724 #.(ppc-opcode mfsr (x 31 595) (logior $xrb-mask (ash 1 20)) ($ppc $b32) $rt $sr)
1725
1726 #.(ppc-opcode lswi (x 31 597) $x-mask ($ppc) $rt $ra $nb)
1727
1728 #.(ppc-opcode lwsync (xsync 31 598 1) #xffffffff ($ppc))
1729 #.(ppc-opcode sync (x 31 598) $xsync-mask ($ppc))
1730
1731 #.(ppc-opcode lfdx (x 31 599) $x-mask ($ppc) $frt $ra $rb)
1732 #.(ppc-opcode lfdux (x 31 631) $x-mask ($ppc) $frt $ras $rb)
1733
1734 #.(ppc-opcode mfsrin (x 31 659) $xra-mask ($ppc $b32) $rt $rb)
1735
1736 #.(ppc-opcode stswx (x 31 661) $x-mask ($ppc) $rs $ra $rb)
1737
1738 #.(ppc-opcode stwbrx (x 31 662) $x-mask ($ppc) $rs $ra $rb)
1739
1740 #.(ppc-opcode stfsx (x 31 663) $x-mask ($ppc) $frs $ra $rb)
1741 #.(ppc-opcode stfsux (x 31 695) $x-mask ($ppc) $frs $ras $rb)
1742 #.(ppc-opcode stswi (x 31 725) $x-mask ($ppc) $rs $ra $nb)
1743 #.(ppc-opcode stfdx (x 31 727) $x-mask ($ppc) $frs $ra $rb)
1744 #.(ppc-opcode stfdux (x 31 759) $x-mask ($ppc) $frs $ras $rb)
1745 #.(ppc-opcode lhbrx (x 31 790) $x-mask ($ppc) $rt $ra $rb)
1746 #.(ppc-opcode sraw (xrc 31 792) $x-mask ($ppc) $rta $rs $rb)
1747 #.(ppc-opcode sraw. (xrc 31 792 1) $x-mask ($ppc) $rta $rs $rb)
1748
1749
1750 #.(ppc-opcode srad (xrc 31 794) $x-mask ($ppc $b64) $rta $rs $rb)
1751 #.(ppc-opcode srad. (xrc 31 794 1) $x-mask ($ppc $b64) $rta $rs $rb)
1752
1753
1754 #.(ppc-opcode srawi (xrc 31 824) $x-mask ($ppc) $rta $rs $sh)
1755 #.(ppc-opcode srawi. (xrc 31 824 1) $x-mask ($ppc) $rta $rs $sh)
1756
1757 #.(ppc-opcode eieio (x 31 854) #xffffffff ($ppc))
1758
1759 #.(ppc-opcode sthbrx (x 31 918) $x-mask ($ppc) $rs $ra $rb)
1760
1761 #.(ppc-opcode extsh (xrc 31 922) $xrb-mask ($ppc) $rta $rs)
1762 #.(ppc-opcode extsh. (xrc 31 922 1) $xrb-mask ($ppc) $rta $rs)
1763
1764 #.(ppc-opcode extsb (xrc 31 954) $xrb-mask ($ppc) $rta $rs)
1765 #.(ppc-opcode extsb. (xrc 31 954 1) $xrb-mask ($ppc) $rta $rs)
1766
1767 #.(ppc-opcode icbi (x 31 982) $xrt-mask ($ppc) $ra $rb)
1768
1769 #.(ppc-opcode stfiwx (x 31 983) $x-mask ($ppc) $frs $ra $rb)
1770
1771 #.(ppc-opcode extsw (xrc 31 986) $xrb-mask ($ppc) $rta $rs)
1772 #.(ppc-opcode extsw. (xrc 31 986 1) $xrb-mask ($ppc) $rta $rs)
1773
1774 #.(ppc-opcode dcbz (x 31 1014) $xrt-mask ($ppc) $ra $rb)
1775 #.(ppc-opcode dclz (x 31 1014) $xrt-mask ($ppc) $ra $rb)
1776
1777 #.(ppc-opcode lvebx (x 31 7) $x-mask ($ppc) $vd $ra $rb)
1778 #.(ppc-opcode lvehx (x 31 39) $x-mask ($ppc) $vd $ra $rb)
1779 #.(ppc-opcode lvewx (x 31 71) $x-mask ($ppc) $vd $ra $rb)
1780 #.(ppc-opcode lvsl (x 31 6) $x-mask ($ppc) $vd $ra $rb)
1781 #.(ppc-opcode lvsr (x 31 38) $x-mask ($ppc) $vd $ra $rb)
1782 #.(ppc-opcode lvx (x 31 103) $x-mask ($ppc) $vd $ra $rb)
1783 #.(ppc-opcode lvxl (x 31 359) $x-mask ($ppc) $vd $ra $rb)
1784 #.(ppc-opcode stvebx (x 31 135) $x-mask ($ppc) $vs $ra $rb)
1785 #.(ppc-opcode stvehx (x 31 167) $x-mask ($ppc) $vs $ra $rb)
1786 #.(ppc-opcode stvewx (x 31 199) $x-mask ($ppc) $vs $ra $rb)
1787 #.(ppc-opcode stvx (x 31 231) $x-mask ($ppc) $vs $ra $rb)
1788 #.(ppc-opcode stvxl (x 31 487) $x-mask ($ppc) $vs $ra $rb)
1789
1790 #.(ppc-opcode dss (x 31 822) $x-mask ($ppc) $strm $all/transient)
1791 #.(ppc-opcode dst (x 31 342) $x-mask ($ppc) $ra $rb $strm $all/transient)
1792 #.(ppc-opcode dstst (x 31 374) $x-mask ($ppc) $ra $rb $strm $all/transient)
1793
1794 #.(ppc-opcode lwz (op 32) $op-mask ($ppc) $rt $d $ra)
1795
1796 #.(ppc-opcode lwzu (op 33) $op-mask ($ppc) $rt $d $ral)
1797
1798 #.(ppc-opcode lbz (op 34) $op-mask ($ppc) $rt $d $ra)
1799
1800 #.(ppc-opcode lbzu (op 35) $op-mask ($ppc) $rt $d $ral)
1801
1802 #.(ppc-opcode stw (op 36) $op-mask ($ppc) $rs $d $ra)
1803
1804 #.(ppc-opcode stwu (op 37) $op-mask ($ppc) $rs $d $ras)
1805
1806 #.(ppc-opcode stb (op 38) $op-mask ($ppc) $rs $d $ra)
1807
1808 #.(ppc-opcode stbu (op 39) $op-mask ($ppc) $rs $d $ras)
1809
1810 #.(ppc-opcode lhz (op 40) $op-mask ($ppc) $rt $d $ra)
1811
1812 #.(ppc-opcode lhzu (op 41) $op-mask ($ppc) $rt $d $ral)
1813
1814 #.(ppc-opcode lha (op 42) $op-mask ($ppc) $rt $d $ra)
1815
1816 #.(ppc-opcode lhau (op 43) $op-mask ($ppc) $rt $d $ral)
1817
1818 #.(ppc-opcode sth (op 44) $op-mask ($ppc) $rs $d $ra)
1819
1820 #.(ppc-opcode sthu (op 45) $op-mask ($ppc) $rs $d $ras)
1821
1822 #.(ppc-opcode lmw (op 46) $op-mask ($ppc) $rt $d $ram)
1823
1824 #.(ppc-opcode stmw (op 47) $op-mask ($ppc) $rs $d $ra)
1825
1826 #.(ppc-opcode lfs (op 48) $op-mask ($ppc) $frt $d $ra)
1827
1828 #.(ppc-opcode lfsu (op 49) $op-mask ($ppc) $frt $d $ras)
1829
1830 #.(ppc-opcode lfd (op 50) $op-mask ($ppc) $frt $d $ra)
1831
1832 #.(ppc-opcode lfdu (op 51) $op-mask ($ppc) $frt $d $ras)
1833
1834 #.(ppc-opcode stfs (op 52) $op-mask ($ppc) $frs $d $ra)
1835
1836 #.(ppc-opcode stfsu (op 53) $op-mask ($ppc) $frs $d $ras)
1837
1838 #.(ppc-opcode stfd (op 54) $op-mask ($ppc) $frs $d $ra)
1839
1840 #.(ppc-opcode stfdu (op 55) $op-mask ($ppc) $frs $d $ras)
1841
1842
1843
1844
1845 #.(ppc-opcode ld (dso 58 0) $ds-mask ($ppc $b64) $rt $ds $ra)
1846
1847 #.(ppc-opcode ldu (dso 58 1) $ds-mask ($ppc $b64) $rt $ds $ral)
1848
1849 #.(ppc-opcode lwa (dso 58 2) $ds-mask ($ppc $b64) $rt $ds $ra)
1850
1851
1852 #.(ppc-opcode fdivs (a 59 18 0) $afrc-mask ($ppc) $frt $fra $frb)
1853 #.(ppc-opcode fdivs. (a 59 18 1) $afrc-mask ($ppc) $frt $fra $frb)
1854
1855 #.(ppc-opcode fsubs (a 59 20 0) $afrc-mask ($ppc) $frt $fra $frb)
1856 #.(ppc-opcode fsubs. (a 59 20 1) $afrc-mask ($ppc) $frt $fra $frb)
1857
1858 #.(ppc-opcode fadds (a 59 21 0) $afrc-mask ($ppc) $frt $fra $frb)
1859 #.(ppc-opcode fadds. (a 59 21 1) $afrc-mask ($ppc) $frt $fra $frb)
1860
1861 #.(ppc-opcode fsqrts (a 59 22 0) $afrafrc-mask ($ppc) $frt $frb)
1862 #.(ppc-opcode fsqrts. (a 59 22 1) $afrafrc-mask ($ppc) $frt $frb)
1863
1864 #.(ppc-opcode fres (a 59 24 0) $afrafrc-mask ($ppc) $frt $frb)
1865 #.(ppc-opcode fres. (a 59 24 1) $afrafrc-mask ($ppc) $frt $frb)
1866
1867 #.(ppc-opcode fmuls (a 59 25 0) $afrb-mask ($ppc) $frt $fra $frc)
1868 #.(ppc-opcode fmuls. (a 59 25 1) $afrb-mask ($ppc) $frt $fra $frc)
1869
1870 #.(ppc-opcode fmsubs (a 59 28 0) $a-mask ($ppc) $frt $fra $frc $frb)
1871 #.(ppc-opcode fmsubs. (a 59 28 1) $a-mask ($ppc) $frt $fra $frc $frb)
1872
1873 #.(ppc-opcode fmadds (a 59 29 0) $a-mask ($ppc) $frt $fra $frc $frb)
1874 #.(ppc-opcode fmadds. (a 59 29 1) $a-mask ($ppc) $frt $fra $frc $frb)
1875
1876 #.(ppc-opcode fnmsubs (a 59 30 0) $a-mask ($ppc) $frt $fra $frc $frb)
1877 #.(ppc-opcode fnmsubs. (a 59 30 1) $a-mask ($ppc) $frt $fra $frc $frb)
1878
1879 #.(ppc-opcode fnmadds (a 59 31 0) $a-mask ($ppc) $frt $fra $frc $frb)
1880 #.(ppc-opcode fnmadds. (a 59 31 1) $a-mask ($ppc) $frt $fra $frc $frb)
1881
1882
1883
1884
1885 #.(ppc-opcode std (dso 62 0) $ds-mask ($ppc $b64) $rs $ds $ra)
1886
1887 #.(ppc-opcode stdu (dso 62 1) $ds-mask ($ppc $b64) $rs $ds $ras)
1888
1889
1890 #.(ppc-opcode fcmpu (x 63 0) (logior $x-mask (ash 3 21)) ($ppc) $bf $fra $frb)
1891
1892 #.(ppc-opcode frsp (xrc 63 12) $xra-mask ($ppc) $frt $frb)
1893 #.(ppc-opcode frsp. (xrc 63 12 1) $xra-mask ($ppc) $frt $frb)
1894
1895 #.(ppc-opcode fctiw (xrc 63 14) $xra-mask ($ppc) $frt $frb)
1896 #.(ppc-opcode fctiw. (xrc 63 14 1) $xra-mask ($ppc) $frt $frb)
1897
1898 #.(ppc-opcode fctiwz (xrc 63 15) $xra-mask ($ppc) $frt $frb)
1899 #.(ppc-opcode fctiwz. (xrc 63 15 1) $xra-mask ($ppc) $frt $frb)
1900
1901 #.(ppc-opcode fdiv (a 63 18 0) $afrc-mask ($ppc) $frt $fra $frb)
1902 #.(ppc-opcode fdiv. (a 63 18 1) $afrc-mask ($ppc) $frt $fra $frb)
1903
1904 #.(ppc-opcode fsub (a 63 20 0) $afrc-mask ($ppc) $frt $fra $frb)
1905 #.(ppc-opcode fsub. (a 63 20 1) $afrc-mask ($ppc) $frt $fra $frb)
1906
1907 #.(ppc-opcode fadd (a 63 21 0) $afrc-mask ($ppc) $frt $fra $frb)
1908 #.(ppc-opcode fadd. (a 63 21 1) $afrc-mask ($ppc) $frt $fra $frb)
1909
1910 #.(ppc-opcode fsqrt (a 63 22 0) $afrafrc-mask ($ppc) $frt $frb)
1911 #.(ppc-opcode fsqrt. (a 63 22 1) $afrafrc-mask ($ppc) $frt $frb)
1912
1913 #.(ppc-opcode fsel (a 63 23 0) $a-mask ($ppc) $frt $fra $frc $frb)
1914 #.(ppc-opcode fsel. (a 63 23 1) $a-mask ($ppc) $frt $fra $frc $frb)
1915
1916 #.(ppc-opcode fmul (a 63 25 0) $afrb-mask ($ppc) $frt $fra $frc)
1917 #.(ppc-opcode fmul. (a 63 25 1) $afrb-mask ($ppc) $frt $fra $frc)
1918
1919 #.(ppc-opcode fmsub (a 63 28 0) $a-mask ($ppc) $frt $fra $frc $frb)
1920 #.(ppc-opcode fmsub. (a 63 28 1) $a-mask ($ppc) $frt $fra $frc $frb)
1921
1922 #.(ppc-opcode fmadd (a 63 29 0) $a-mask ($ppc) $frt $fra $frc $frb)
1923 #.(ppc-opcode fmadd. (a 63 29 1) $a-mask ($ppc) $frt $fra $frc $frb)
1924
1925 #.(ppc-opcode fnmsub (a 63 30 0) $a-mask ($ppc) $frt $fra $frc $frb)
1926 #.(ppc-opcode fnmsub. (a 63 30 1) $a-mask ($ppc) $frt $fra $frc $frb)
1927
1928 #.(ppc-opcode fnmadd (a 63 31 0) $a-mask ($ppc) $frt $fra $frc $frb)
1929 #.(ppc-opcode fnmadd. (a 63 31 1) $a-mask ($ppc) $frt $fra $frc $frb)
1930
1931 #.(ppc-opcode fcmpo (x 63 32) (logior $x-mask (ash 3 21)) ($ppc) $bf $fra $frb)
1932
1933 #.(ppc-opcode mtfsb1 (xrc 63 38) $xrarb-mask ($ppc) $bt)
1934 #.(ppc-opcode mtfsb1. (xrc 63 38 1) $xrarb-mask ($ppc) $bt)
1935
1936 #.(ppc-opcode fneg (xrc 63 40) $xra-mask ($ppc) $frt $frb)
1937 #.(ppc-opcode fneg. (xrc 63 40 1) $xra-mask ($ppc) $frt $frb)
1938
1939 #.(ppc-opcode mcrfs (x 63 64) (logior $xrb-mask (ash 3 21) (ash 3 16)) ($ppc) $bf $bfa)
1940
1941 #.(ppc-opcode mtfsb0 (xrc 63 70) $xrarb-mask ($ppc) $bt)
1942 #.(ppc-opcode mtfsb0. (xrc 63 70 1) $xrarb-mask ($ppc) $bt)
1943
1944 #.(ppc-opcode fmr (xrc 63 72) $xra-mask ($ppc) $frt $frb)
1945 #.(ppc-opcode fmr. (xrc 63 72 1) $xra-mask ($ppc) $frt $frb)
1946
1947 #.(ppc-opcode mtfsfi (xrc 63 134) (logior $xra-mask (ash 3 21) (ash 1 11)) ($ppc) $bf $u)
1948 #.(ppc-opcode mtfsfi. (xrc 63 134 1) (logior $xra-mask (ash 3 21) (ash 1 11)) ($ppc) $bf $u)
1949
1950 #.(ppc-opcode fnabs (xrc 63 136) $xra-mask ($ppc) $frt $frb)
1951 #.(ppc-opcode fnabs. (xrc 63 136 1) $xra-mask ($ppc) $frt $frb)
1952
1953 #.(ppc-opcode fabs (xrc 63 264) $xra-mask ($ppc) $frt $frb)
1954 #.(ppc-opcode fabs. (xrc 63 264 1) $xra-mask ($ppc) $frt $frb)
1955
1956 #.(ppc-opcode mffs (xrc 63 583) $xrarb-mask ($ppc) $frt)
1957 #.(ppc-opcode mffs. (xrc 63 583 1) $xrarb-mask ($ppc) $frt)
1958
1959 #.(ppc-opcode mtfsf (xfl 63 711) $xfl-mask ($ppc) $flm $frb)
1960 #.(ppc-opcode mtfsf. (xfl 63 711 1) $xfl-mask ($ppc) $flm $frb)
1961
1962 #.(ppc-opcode fctid (xrc 63 814) $xra-mask ($ppc $b64) $frt $frb)
1963 #.(ppc-opcode fctid. (xrc 63 814 1) $xra-mask ($ppc $b64) $frt $frb)
1964
1965 #.(ppc-opcode fctidz (xrc 63 815) $xra-mask ($ppc $b64) $frt $frb)
1966 #.(ppc-opcode fctidz. (xrc 63 815 1) $xra-mask ($ppc $b64) $frt $frb)
1967
1968 #.(ppc-opcode fcfid (xrc 63 846) $xra-mask ($ppc $b64) $frt $frb)
1969 #.(ppc-opcode fcfid. (xrc 63 846 1) $xra-mask ($ppc $b64) $frt $frb)
1970
1971))
1972
1973(defvar *ppc-opcode-indices* (make-array 64 :initial-element -1))
1974(defvar *ppc-opcode-counts* (make-array 64 :initial-element 0))
1975(defvar *ppc-opcode-numbers* (make-hash-table :test #'equalp))
1976(defvar *ppc-instruction-macros* (make-hash-table :test #'equalp))
1977
1978(defun initialize-ppc-opcode-numbers ()
1979 (clrhash *ppc-opcode-numbers*)
1980 (dotimes (i 64)
1981 (setf (svref *ppc-opcode-indices* i) -1
1982 (svref *ppc-opcode-counts* i) 0))
1983 (dotimes (i (length *ppc-opcodes*))
1984 (let* ((code (svref *ppc-opcodes* i))
1985 (opcode (ccl::opcode-opcode code))
1986 (mask (ccl::opcode-mask code)))
1987 (setf (gethash (string (ccl::opcode-name code)) *ppc-opcode-numbers*) i)
1988 (setf (ccl::opcode-op-high code) (ldb (byte 16 16) opcode)
1989 (ccl::opcode-op-low code) (ldb (byte 16 0) opcode)
1990 (ccl::opcode-mask-high code) (ldb (byte 16 16) mask)
1991 (ccl::opcode-mask-low code) (ldb (byte 16 0) mask))
1992 (setf (ccl::opcode-vinsn-operands code) (ccl::opcode-operands code)
1993 (ccl::opcode-min-vinsn-args code) (ccl::opcode-min-args code)
1994 (ccl::opcode-max-vinsn-args code) (ccl::opcode-max-args code))
1995 (let* ((op (ccl::opcode-majorop code)))
1996 (if (= -1 (svref *ppc-opcode-indices* op))
1997 (setf (svref *ppc-opcode-indices* op) i
1998 (svref *ppc-opcode-counts* op) 1)
1999 (incf (svref *ppc-opcode-counts* op))))))
2000 (when (fboundp 'ccl::fixup-vinsn-templates) ; not defined yet at bootstrap time
2001 (ccl::fixup-vinsn-templates (ccl::backend-p2-vinsn-templates ccl::*target-backend*) *ppc-opcode-numbers* ))
2002 (when (fboundp 'ccl::fixup-ppc-backend)
2003 (ccl::fixup-ppc-backend)))
2004
2005(initialize-ppc-opcode-numbers)
2006
2007
2008(defmacro defppcmacro (name arglist &body body)
2009 `(setf (ppc-macro-function ',(string name))
2010 #',(ccl:parse-macro name arglist body)))
2011
2012(defun ppc-macro-function (name)
2013 (gethash (string name) *ppc-instruction-macros*))
2014
2015(defun (setf ppc-macro-function) (new-function name)
2016 (if (gethash name *ppc-opcode-numbers*)
2017 (error "~s is already defined as an assembler instruction" name))
2018 (setf (gethash name *ppc-instruction-macros*) new-function))
2019
2020(defppcmacro extlwi (ra rs n b)
2021 `(rlwinm ,ra ,rs ,b 0 (1- ,n)))
2022
2023(defppcmacro extlwi. (ra rs n b)
2024 `(rlwinm. ,ra ,rs ,b 0 (1- ,n)))
2025
2026(defppcmacro extrwi (ra rs n b)
2027 `(rlwinm ,ra ,rs (+ ,b ,n) (- 32 ,n) 31))
2028
2029(defppcmacro extrwi. (ra rs n b)
2030 `(rlwinm. ,ra ,rs (+ ,b ,n) (- 32 ,n) 31))
2031
2032(defppcmacro inslwi (ra rs n b)
2033 `(rlwimi ,ra ,rs (- 32 ,b) ,b (1- (+ ,b ,n))))
2034
2035(defppcmacro inslwi. (ra rs n b)
2036 `(rlwimi. ,ra ,rs (- 32 ,b) ,b (1- (+ ,b ,n))))
2037
2038(defppcmacro insrwi (ra rs n b)
2039 `(rlwimi ,ra ,rs (- 32 (+ ,b ,n)) ,b (1- (+ ,b ,n))))
2040
2041(defppcmacro insrwi. (ra rs n b)
2042 `(rlwimi. ,ra ,rs (- 32 (+ ,b ,n)) ,b (1- (+ ,b ,n))))
2043
2044(defppcmacro rotrwi (ra rs n)
2045 `(rlwinm ,ra ,rs (- 32 ,n) 0 31))
2046
2047(defppcmacro rotrwi. (ra rs n)
2048 `(rlwinm. ,ra ,rs (- 32 ,n) 0 31))
2049
2050(defppcmacro slwi (ra rs n)
2051 `(rlwinm ,ra ,rs ,n 0 (- 31 ,n)))
2052
2053(defppcmacro slwi. (ra rs n)
2054 `(rlwinm. ,ra ,rs ,n 0 (- 31 ,n)))
2055
2056(defppcmacro srwi (ra rs n)
2057 `(rlwinm ,ra ,rs (- 32 ,n) ,n 31))
2058
2059(defppcmacro srwi. (ra rs n)
2060 `(rlwinm. ,ra ,rs (- 32 ,n) ,n 31))
2061
2062(defppcmacro clrrwi (ra rs n)
2063 `(rlwinm ,ra ,rs 0 0 (- 31 ,n)))
2064
2065(defppcmacro clrrwi. (ra rs n)
2066 `(rlwinm. ,ra ,rs 0 0 (- 31 ,n)))
2067
2068(defppcmacro clrlslwi (ra rs b n)
2069 `(rlwinm ,ra ,rs ,n (- ,b ,n) (- 31 ,n)))
2070
2071(defppcmacro clrlslwi. (ra rs b n)
2072 `(rlwinm. ,ra ,rs ,n (- ,b ,n) (- 31 ,n)))
2073
2074(defppcmacro extldi (ra rs n b)
2075 `(rldicr ,ra ,rs ,b ,n))
2076
2077(defppcmacro extldi. (ra rs n b)
2078 `(rldicr. ,ra ,rs ,b ,n))
2079
2080(defppcmacro extrdi (ra rs n b)
2081 `(rldicl ,ra ,rs (+ ,b ,n) (- 64 ,n)))
2082
2083(defppcmacro extrdi. (ra rs n b)
2084 `(rldicl. ,ra ,rs (+ ,b ,n) (- 64 ,n)))
2085
2086(defppcmacro insrdi (ra rs n b)
2087 `(rldimi ,ra ,rs (- 64 (+ ,b ,n)) ,b))
2088
2089(defppcmacro insrdi. (ra rs n b)
2090 `(rldimi. ,ra ,rs (- 64 (+ ,b ,n)) ,b))
2091
2092(defppcmacro rotrdi (ra rs n)
2093 `(rldicl ,ra ,rs (- 64 ,n) 0))
2094
2095(defppcmacro rotrdi. (ra rs n)
2096 `(rldicl. ,ra ,rs (- 64 ,n) 0))
2097
2098(defppcmacro sldi (ra rs n)
2099 `(rldicr ,ra ,rs ,n (- 63 ,n)))
2100
2101(defppcmacro sldi. (ra rs n)
2102 `(rldicr. ,ra ,rs ,n (- 63 ,n)))
2103
2104(defppcmacro srdi (ra rs n)
2105 `(rldicl ,ra ,rs (- 64 ,n) ,n))
2106
2107(defppcmacro srdi. (ra rs n)
2108 `(rldicl. ,ra ,rs (- 64 ,n) ,n))
2109
2110(defppcmacro clrrdi (ra rs n)
2111 `(rldicr ,ra ,rs 0 (- 63 ,n)))
2112
2113(defppcmacro clrrdi. (ra rs n)
2114 `(rldicr. ,ra ,rs 0 (- 63 ,n)))
2115
2116(defppcmacro clrlsldi (ra rs b sh)
2117 `(rldic ,ra ,rs ,sh (- ,b ,sh)))
2118
2119(defppcmacro clrlsldi. (ra rs b sh)
2120 `(rldic. ,ra ,rs ,sh (- ,b ,sh)))
2121
2122
2123;; Vector unit macros
2124(defppcmacro dssall ()
2125 ;;Data stream stop all
2126 `(dss 0 1))
2127
2128(defppcmacro dstt (a b strm)
2129 `(dst ,a ,b ,strm 1))
2130
2131(defppcmacro dststt (a b strm)
2132 `(dstst ,a ,b ,strm 1))
2133
2134(defppcmacro vmr (vd vs)
2135 ;;Analogous to mr for GP registers. Moves contents of vs to vd
2136 `(vor ,vd ,vs ,vs))
2137
2138
2139
2140
2141;; The BA field in an XL form instruction when it must be the same as
2142;; the BT field in the same instruction. This operand is marked FAKE.
2143;; The insertion function just copies the BT field into the BA field,
2144;; and the extraction function just checks that the fields are the
2145;; same.
2146
2147(defun insert-bat (high low val)
2148 (declare (ignore val))
2149 (values (dpb (ldb (byte 5 (- 21 16)) high) (byte 5 (- 16 16)) high) low))
2150
2151(defun extract-bat (instr)
2152 (if (= (ldb (byte 5 21) instr) (ldb (byte 5 16) instr))
2153 0))
2154
2155;; The BB field in an XL form instruction when it must be the same as
2156;; the BA field in the same instruction. This operand is marked FAKE.
2157;; The insertion function just copies the BA field into the BB field,
2158;; and the extraction function just checks that the fields are the
2159;; same.
2160
2161(defun insert-bba (high low val)
2162 (declare (ignore val))
2163 (values high (dpb (ldb (byte 5 (- 21 16)) high) (byte 5 11) low)))
2164
2165(defun extract-bba (instr)
2166 (if (= (ldb (byte 5 16) instr) (ldb (byte 5 11) instr))
2167 0))
2168
2169;; The BD field in a B form instruction. The lower two bits are
2170;; forced to zero.
2171
2172(defun insert-bd (high low val)
2173 (values high (logior (logand val #xfffc) (logand low 3))))
2174
2175(defun extract-bd (instr)
2176 (- (logand instr #xfffc)
2177 (if (logbitp 15 instr) ; negative branch displacement
2178 #x10000
2179 0)))
2180
2181;; The BD field in a B form instruction when the - modifier is used.
2182;; This modifier means that the branch is not expected to be taken.
2183;; We must set the y bit of the BO field to 1 if the offset is
2184;; negative. When extracting, we require that the y bit be 1 and that
2185;; the offset be positive, since if the y bit is 0 we just want to
2186;; print the normal form of the instruction.
2187
2188(defun insert-bdm (high low val)
2189 (values
2190 (if (logbitp 15 val) (logior high (ash 1 (- 21 16))) high)
2191 (logior (logand val #xfffc) (logand low 3))))
2192
2193(defun extract-bdm (instr)
2194 ;; Recognize this if both the "y" (branch predict false) bit
2195 ;; is set and the displacement is negative.
2196 (if (and (logbitp 15 instr) ; branch disp is negative
2197 (logbitp 21 instr)) ; prediction inverted
2198 (extract-bd instr))) ; return the displacement
2199
2200;; The BD field in a B form instruction when the + modifier is used.
2201;; This is like BDM, above, except that the branch is expected to be
2202;; taken.
2203
2204(defun insert-bdp (high low val)
2205 (values
2206 (if (logbitp 15 val) high (logior high (ash 1 (- 21 16))))
2207 (logior (logand val #xfffc) (logand low 3))))
2208
2209(defun extract-bdp (instr)
2210 ;; Recognize this if both the "y" (branch predict false) bit
2211 ;; is set and the displacement is non-negative.
2212 (if (and (not (logbitp 15 instr)) ; branch disp is non-negative
2213 (logbitp 21 instr)) ; prediction inverted
2214 (extract-bd instr))) ; return the displacement
2215
2216;; return nil if val isn't a valid bo field i.e. if it has any reserved bits set.
2217(defun valid-bo (val)
2218 (and (= val (ldb (byte 5 0) val))
2219 (case (logand val #x14)
2220 (4 (not (logbitp 1 val)))
2221 (#x10 (not (logbitp 3 val)))
2222 (#x14 (= val #x14))
2223 (t t))))
2224
2225;; The BO field in a B form instruction. Fail on attempts to set
2226;; the field to an illegal value.
2227(defun insert-bo (high low val)
2228 (if (valid-bo val)
2229 (values (dpb val (byte 5 (- 21 16)) high) low)))
2230
2231(defun extract-bo (instr)
2232 (let* ((val (ldb (byte 5 21) instr)))
2233 (and (valid-bo val) val)))
2234
2235;; The BO field in a B form instruction when the + or - modifier is
2236;; used. This is like the BO field, but it must be even. When
2237;; extracting it, we force it to be even.
2238
2239(defun insert-boe (high low val)
2240 (unless (logbitp 0 val) (insert-bo high low val)))
2241
2242(defun extract-boe (instr)
2243 (let* ((val (extract-bo instr)))
2244 (if val (logandc2 val 1))))
2245
2246;; The condition register number portion of the BI field in a B form
2247;; or XL form instruction. This is used for the extended conditional
2248;; branch mnemonics, which set the lower two bits of the BI field. It
2249;; is the BI field with the lower two bits ignored.
2250
2251(defun insert-cr (high low val)
2252 (values (dpb (ash val -2) (byte 3 (- 18 16)) high) low))
2253
2254(defun extract-cr (instr)
2255 (logandc2 (ldb (byte 5 16) instr) 3))
2256
2257(defun insert-bf (high low val)
2258 (values (dpb (ash val -2) (byte 3 (- 23 16)) high) low))
2259
2260(defun extract-bf (instr)
2261 (logandc2 (ldb (byte 5 21) instr) 3))
2262
2263
2264;; The DS field in a DS form instruction. This is like D, but the
2265;; lower two bits are forced to zero.
2266(defun insert-ds (high low val)
2267 (when (logtest #b11 val)
2268 (warn "low two bits of operand #x~8,'0x must be zero - clearing."
2269 val))
2270 (values high (logior low (logand val #xfffc))))
2271
2272(defun extract-ds (instr)
2273 (- (logand instr #xfffc) (if (logbitp 15 instr) #x10000 0)))
2274
2275;; The LI field in an I form instruction. The lower two bits are
2276;; forced to zero.
2277
2278(defun insert-li (high low val)
2279 (values (dpb (ash val -16) (byte 10 (- 16 16)) high) (logior (logand val #xfffc) (logand low 3))))
2280
2281(defun extract-li (instr)
2282 (- (logand instr #x3fffffc) (if (logbitp 25 instr) #x4000000 0)))
2283
2284;; The MB and ME fields in an M form instruction expressed as a single
2285;; operand which is itself a bitmask. The extraction function always
2286;; marks it as invalid, since we never want to recognize an
2287;; instruction which uses a field of this type.
2288
2289#|
2290(defun insert-mbe (instr val)
2291 (let* ((uval val)
2292 (me 31))
2293 (declare (integer uval)
2294 (fixnum me))
2295 (when (/= uval 0)
2296 (do ()
2297 ((logbitp 0 uval))
2298 (setq uval (ash uval -1))
2299 (decf me))
2300 (let* ((nbits (logcount uval))
2301 (mb (- (1+ me) nbits)))
2302 (declare (fixnum nbits mb))
2303 (when (= nbits (integer-length uval))
2304 (dpb me (byte 5 1) (dpb mb (byte 5 6) instr)))))))
2305
2306
2307(defun extract-mbe (instr)
2308 (declare (ignore instr)))
2309
2310;; The MB or ME field in an MD or MDS form instruction. The high bit
2311;; is wrapped to the low end.
2312
2313
2314|#
2315
2316;; The NB field in an X form instruction. The value 32 is stored as
2317;; 0.
2318
2319(defun insert-nb (high low val)
2320 (if (<= 0 val 32)
2321 (values high (dpb val (byte 5 11) low))))
2322
2323(defun extract-nb (instr)
2324 (let* ((val (ldb (byte 5 11) instr)))
2325 (declare (fixnum val))
2326 (if (= val 0) 32 val)))
2327
2328;; The NSI field in a D form instruction. This is the same as the SI
2329;; field, only negated. The extraction function always marks it as
2330;; invalid, since we never want to recognize an instruction which uses
2331;; a field of this type.
2332(defun insert-nsi (high low val)
2333 (declare (ignore low))
2334 (values high (logand (- val) #xffff)))
2335
2336(defun extract-nsi (instr)
2337 (declare (ignore instr)))
2338
2339;; The RA field in a D or X form instruction which is an updating
2340;; load, which means that the RA field may not be zero and may not
2341;; equal the RT field.
2342
2343(defun insert-ral (high low val)
2344 (and (/= val 0)
2345 (/= val (ldb (byte 5 (- 21 16)) high))
2346 (values (dpb val (byte 5 (- 16 16)) high) low)))
2347
2348;; The RA field in an lmw instruction, which has special value
2349;; restrictions.
2350(defun insert-ram (high low val)
2351 (if (< val (ldb (byte 5 (- 21 16)) high))
2352 (values (dpb val (byte 5 (- 16 16)) high) low)))
2353
2354;; The RA field in a D or X form instruction which is an updating
2355;; store or an updating floating point load, which means that the RA
2356;; field may not be zero.
2357
2358(defun insert-ras (high low val)
2359 (unless (= val 0)
2360 (values (dpb val (byte 5 (- 16 16)) high) low)))
2361
2362;; The RB field in an X form instruction when it must be the same as
2363;; the RS field in the instruction. This is used for extended
2364;; mnemonics like mr. This operand is marked FAKE. The insertion
2365;; function just copies the BT field into the BA field, and the
2366;; extraction function just checks that the fields are the same.
2367
2368(defun insert-rbs (high low val)
2369 (declare (ignore val))
2370 (values high (dpb (ldb (byte 5 (- 21 16)) high) (byte 5 11) low)))
2371
2372(defun extract-rbs (instr)
2373 (if (= (ldb (byte 5 21) instr) (ldb (byte 5 11) instr))
2374 0))
2375
2376;; The SH field in an MD form instruction. This is split.
2377(defun insert-sh6 (high low val)
2378 (values high
2379 (dpb (ldb (byte 5 0) val) (byte 5 11)
2380 (dpb (ldb (byte 1 5) val) (byte 1 1) low))))
2381
2382(defun extract-sh6 (instr)
2383 (logior (ldb (byte 5 11) instr) (ash (ldb (byte 1 1) instr) 5)))
2384
2385
2386(defun insert-mb6 (high low val)
2387 (values high
2388 (dpb (ldb (byte 1 5) val)
2389 (byte 1 5)
2390 (dpb val (byte 5 6) low))))
2391
2392(defun extract-mb6 (instr)
2393 (dpb (ldb (byte 1 5) instr)
2394 (byte 1 5)
2395 (ldb (byte 5 6) instr)))
2396
2397
2398;; The SPR or TBR field in an XFX form instruction. This is
2399;; flipped--the lower 5 bits are stored in the upper 5 and vice-
2400;; versa.
2401(defun insert-spr (high low val)
2402 (values (dpb val (byte 5 (- 16 16)) high)
2403 (logior low (ash (logand val #x3e0) 6))))
2404
2405
2406(defun extract-spr (instr)
2407 (logior (ldb (byte 5 16) instr) (logand #x3e0 (ash instr -6))))
2408
2409(defun insert-default (operand high low val)
2410 (let* ((width (ccl::operand-width operand))
2411 (offset (ccl::operand-offset operand))
2412 (msbit (1- (+ width offset))))
2413 (declare (fixnum width offset msbit))
2414 (if (>= offset 16)
2415 (values (dpb val (byte width (- offset 16)) high) low)
2416 (if (< msbit 16)
2417 (values high (dpb val (byte width offset) low))
2418 (let* ((lowbits (- 16 offset)))
2419 (values
2420 (dpb (the fixnum (ash val (the fixnum (- lowbits))))
2421 (byte (the fixnum (- width lowbits)) 0)
2422 high)
2423 (dpb val (byte lowbits offset) low)))))))
2424
2425
2426(defun extract-default (operand instr)
2427 (let* ((width (ccl::operand-width operand))
2428 (op (ldb (byte width (ccl::operand-offset operand)) instr)))
2429 (if (and (logbitp $ppc-operand-signed (ccl::operand-flags operand))
2430 (logbitp (1- width) op))
2431 (- op (ash 1 width))
2432 op)))
2433
2434
2435
2436
2437
2438(defun ccl::lookup-ppc-opcode (name)
2439 (gethash (string name) ppc::*ppc-opcode-numbers*))
2440
2441(provide "PPC-ASM")
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