Ticket #857 (closed defect: fixed)

Opened 4 years ago

Last modified 3 years ago

ARM fp register tracking

Reported by: gb Owned by:
Priority: normal Milestone:
Component: Compiler Version: trunk
Keywords: Cc:

Description

The ARM fp unit generally offers at least 32 single-float registers (s0-s31) and at least 16 double-float registers (d0-d15); modern VFP implementations offer more than 16 doubles.

s0 and s1 occupy the same 64 bits in a 128-bit vector register as does d0, s2 and s3 conflict with d1, etc.

The compiler thinks that (for instance) s1 and d0 are disjoint and thus (at least in theory) might try to keep distinct live values in conflicting FPRs.

Change History

comment:1 Changed 3 years ago by gb

  • Status changed from new to closed
  • Resolution set to fixed

(In [14834]) Re-do the common FPR-tracking/targeting, so that aliased FPRs (as on ARM and SPARC, for that matter) don't confict. (s0 and s1 conflict with d0, s2 and s3 conflict with d1, etc.)

Fixes ticket:857 .

Consider s0-s15 (d0-d7) volatile on ARM.

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